[PATCH] D112302: [TTI] `BasicTTIImplBase::getInterleavedMemoryOpCost()`: fix load discounting
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 22 04:09:29 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2eaef530232e: [TTI] `BasicTTIImplBase::getInterleavedMemoryOpCost()`: fix load discounting (authored by lebedev.ri).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112302/new/
https://reviews.llvm.org/D112302
Files:
llvm/include/llvm/CodeGen/BasicTTIImpl.h
llvm/test/Transforms/LoopVectorize/AArch64/interleaved_cost.ll
Index: llvm/test/Transforms/LoopVectorize/AArch64/interleaved_cost.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/AArch64/interleaved_cost.ll
+++ llvm/test/Transforms/LoopVectorize/AArch64/interleaved_cost.ll
@@ -168,7 +168,7 @@
; gaps.
;
; VF_2-LABEL: Checking a loop in "i64_factor_8"
-; VF_2: Found an estimated cost of 6 for VF 2 For instruction: %tmp2 = load i64, i64* %tmp0, align 8
+; VF_2: Found an estimated cost of 10 for VF 2 For instruction: %tmp2 = load i64, i64* %tmp0, align 8
; VF_2-NEXT: Found an estimated cost of 0 for VF 2 For instruction: %tmp3 = load i64, i64* %tmp1, align 8
; VF_2-NEXT: Found an estimated cost of 7 for VF 2 For instruction: store i64 0, i64* %tmp0, align 8
; VF_2-NEXT: Found an estimated cost of 7 for VF 2 For instruction: store i64 0, i64* %tmp1, align 8
Index: llvm/include/llvm/CodeGen/BasicTTIImpl.h
===================================================================
--- llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -1214,7 +1214,7 @@
//
// TODO: Note that legalization can turn masked loads/stores into unmasked
// (legalized) loads/stores. This can be reflected in the cost.
- if (VecTySize > VecTyLTSize) {
+ if (Cost.isValid() && VecTySize > VecTyLTSize) {
// The number of loads of a legal type it will take to represent a load
// of the unlegalized vector type.
unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
@@ -1231,7 +1231,8 @@
// Scale the cost of the load by the fraction of legal instructions that
// will be used.
- Cost *= UsedInsts.count() / NumLegalInsts;
+ Cost = divideCeil(UsedInsts.count() * Cost.getValue().getValue(),
+ NumLegalInsts);
}
// Then plus the cost of interleave operation.
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