[PATCH] D112232: [NVPTX] Add imm variants for surface and texture instructions

Andrew Savonichev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 21 11:14:25 PDT 2021


asavonic added a comment.

In D112232#3078458 <https://reviews.llvm.org/D112232#3078458>, @tra wrote:

> LGTM in general.
>
> I wonder if we could find a less verbose way to translate `_R` ->`_I` enums. E.g figure out if we can define `_I` variants as `_R + fixed offset`.

It is possible, but we have to rename opcodes to make it work. `GRAD` and `LEVEL` variants break the ordering.

  TEX_1D_F32_F32_GRAD_II	= 2995,     // <---- these 4 are ordered correctly
  TEX_1D_F32_F32_GRAD_IR	= 2996,
  TEX_1D_F32_F32_GRAD_RI	= 2997,
  TEX_1D_F32_F32_GRAD_RR	= 2998,
  TEX_1D_F32_F32_II	= 2999,             // <---- these are not ordered
  TEX_1D_F32_F32_IR	= 3000,
  TEX_1D_F32_F32_LEVEL_II	= 3001,
  TEX_1D_F32_F32_LEVEL_IR	= 3002,
  TEX_1D_F32_F32_LEVEL_RI	= 3003,
  TEX_1D_F32_F32_LEVEL_RR	= 3004,
  TEX_1D_F32_F32_RI	= 3005,
  TEX_1D_F32_F32_RR	= 3006,

Although I think that this can make this code a bit more fragile. If someone changes the tablegen file and accidentally breaks the ordering, this pass will silently break.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112232/new/

https://reviews.llvm.org/D112232



More information about the llvm-commits mailing list