[PATCH] D112242: [RISCV] Merge vector tests for rv32 and rv64 into a single test file

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 21 10:48:31 PDT 2021


craig.topper created this revision.
craig.topper added reviewers: frasercrmck, HsiangKai, khchen, arcbbb, rogfer01, evandro.
Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, kristof.beyls.
craig.topper requested review of this revision.
Herald added a subscriber: MaskRay.
Herald added a project: LLVM.

These tests have nearly identical content the only difference is
that the rv64 test has a signext attribute on some parameters.
That attribute should be harmless on rv32.

Merge them into a single test file with 2 RUN lines.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D112242

Files:
  llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll



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