[PATCH] D112076: [AArch64][SVE][InstCombine] Combine contiguous gather/scatter to load/store
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 21 10:15:12 PDT 2021
paulwalker-arm added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp:874
+ Type *BasePtrTy = BasePtr->getType();
+ Value *PassThru = UndefValue::get(Ty);
+
----------------
The SVE gather intrinsics explicitly zero inactive lanes and so the replacement masked load must do likewise.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D112076/new/
https://reviews.llvm.org/D112076
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