[PATCH] D112127: [Codegen] Set ARITH_FENCE as meta-instruction

[Kan Shengchen via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
skan marked 2 inline comments as done.
Closed by commit rGedff0070a126: [Codegen] Set ARITH_FENCE as meta-instruction (authored by skan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112127/new/

https://reviews.llvm.org/D112127

Files:
  llvm/include/llvm/CodeGen/MachineInstr.h
  llvm/unittests/MIR/MachineMetadata.cpp


Index: llvm/unittests/MIR/MachineMetadata.cpp
===================================================================
--- llvm/unittests/MIR/MachineMetadata.cpp
+++ llvm/unittests/MIR/MachineMetadata.cpp
@@ -290,6 +290,64 @@
   EXPECT_TRUE(checkOutput(CheckString, Output));
 }
 
+TEST_F(MachineMetadataTest, isMetaInstruction) {
+  auto TM = createTargetMachine(Triple::normalize("x86_64--"), "", "");
+  if (!TM)
+    GTEST_SKIP();
+
+  StringRef MIRString = R"MIR(
+--- |
+  define void @test0(i32 %b) {
+    ret void
+  }
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
+  !1 = !DIFile(filename: "a.c", directory: "/tmp")
+  !2 = !{i32 7, !"Dwarf Version", i32 4}
+  !3 = !{i32 2, !"Debug Info Version", i32 3}
+  !4 = !{i32 1, !"wchar_size", i32 4}
+  !5 = !{i32 7, !"uwtable", i32 1}
+  !6 = !{i32 7, !"frame-pointer", i32 2}
+  !7 = !{!""}
+  !8 = distinct !DISubprogram(name: "test0", scope: !1, file: !1, line: 1, type: !9, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !12)
+  !9 = !DISubroutineType(types: !10)
+  !10 = !{null, !11}
+  !11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !12 = !{}
+  !13 = !DILocalVariable(name: "b", arg: 1, scope: !8, file: !1, line: 1, type: !11)
+  !14 = !DILocation(line: 1, column: 16, scope: !8)
+...
+---
+name:            test0
+machineFunctionInfo
+body:             |
+  bb.0:
+  $rdi = IMPLICIT_DEF
+  KILL $rsi
+  CFI_INSTRUCTION undefined $rax
+  EH_LABEL 0
+  GC_LABEL 0
+  DBG_VALUE $rax, $noreg, !13, !DIExpression(), debug-location !14
+  DBG_LABEL 0
+  LIFETIME_START 0
+  LIFETIME_END 0
+  PSEUDO_PROBE 6699318081062747564, 1, 0, 0
+  $xmm0 = ARITH_FENCE $xmm0
+...
+)MIR";
+
+  MachineModuleInfo MMI(TM.get());
+  M = parseMIR(*TM, MIRString, "test0", MMI);
+  ASSERT_TRUE(M);
+
+  auto *MF = MMI.getMachineFunction(*M->getFunction("test0"));
+  auto *MBB = MF->getBlockNumbered(0);
+
+  for (auto It = MBB->begin(); It != MBB->end(); ++It) {
+    MachineInstr &MI = *It;
+    ASSERT_TRUE(MI.isMetaInstruction());
+  }
+}
+
 TEST_F(MachineMetadataTest, MMSlotTrackerX64) {
   auto TM = createTargetMachine(Triple::normalize("x86_64--"), "", "");
   if (!TM)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
===================================================================
--- llvm/include/llvm/CodeGen/MachineInstr.h
+++ llvm/include/llvm/CodeGen/MachineInstr.h
@@ -1331,6 +1331,7 @@
     case TargetOpcode::LIFETIME_START:
     case TargetOpcode::LIFETIME_END:
     case TargetOpcode::PSEUDO_PROBE:
+    case TargetOpcode::ARITH_FENCE:
       return true;
     }
   }


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