[PATCH] D111856: [AArch64][GlobalISel] combine (and (or x, c1), c2) => (and x, c2) iff c1 & c2 == 0

Jon Roelofs via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 20 10:53:43 PDT 2021


jroelofs added a comment.

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Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111856/new/

https://reviews.llvm.org/D111856



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