[llvm] 9fc523d - [X86] Remove X86ProcFamilyEnum::IntelSLM
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 20 03:58:55 PDT 2021
Author: Simon Pilgrim
Date: 2021-10-20T11:58:39+01:00
New Revision: 9fc523d114085d194da90ef108c16c931c40ae38
URL: https://github.com/llvm/llvm-project/commit/9fc523d114085d194da90ef108c16c931c40ae38
DIFF: https://github.com/llvm/llvm-project/commit/9fc523d114085d194da90ef108c16c931c40ae38.diff
LOG: [X86] Remove X86ProcFamilyEnum::IntelSLM
Replace X86ProcFamilyEnum::IntelSLM enum with a TuningUseSLMArithCosts flag instead, matching what we already do for Goldmont.
This just leaves X86ProcFamilyEnum::IntelAtom to replace with general Tuning/Feature flags and we can finally get rid of the old X86ProcFamilyEnum enum.
Differential Revision: https://reviews.llvm.org/D112079
Added:
Modified:
llvm/lib/Target/X86/X86.td
llvm/lib/Target/X86/X86Subtarget.h
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/lib/Target/X86/X86TargetTransformInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
index 32f8ade5f9b6..c7d2ae0c6675 100644
--- a/llvm/lib/Target/X86/X86.td
+++ b/llvm/lib/Target/X86/X86.td
@@ -571,6 +571,10 @@ def TuningFastMOVBE
: SubtargetFeature<"fast-movbe", "HasFastMOVBE", "true",
"Prefer a movbe over a single-use load + bswap / single-use bswap + store">;
+def TuningUseSLMArithCosts
+ : SubtargetFeature<"use-slm-arith-costs", "UseSLMArithCosts", "true",
+ "Use Silvermont specific arithmetic costs">;
+
def TuningUseGLMDivSqrtCosts
: SubtargetFeature<"use-glm-div-sqrt-costs", "UseGLMDivSqrtCosts", "true",
"Use Goldmont specific floating point div/sqrt costs">;
@@ -586,8 +590,6 @@ def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
// Bonnell
def ProcIntelAtom : SubtargetFeature<"", "X86ProcFamily", "IntelAtom", "">;
-// Silvermont
-def ProcIntelSLM : SubtargetFeature<"", "X86ProcFamily", "IntelSLM", "">;
//===----------------------------------------------------------------------===//
// Register File Description
@@ -894,7 +896,7 @@ def ProcessorFeatures {
FeaturePCLMUL,
FeaturePRFCHW,
FeatureRDRAND];
- list<SubtargetFeature> SLMTuning = [ProcIntelSLM,
+ list<SubtargetFeature> SLMTuning = [TuningUseSLMArithCosts,
TuningSlowTwoMemOps,
TuningSlowLEA,
TuningSlowIncDec,
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index 455e947c7b67..9da54dc2e9b7 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -54,8 +54,7 @@ class X86Subtarget final : public X86GenSubtargetInfo {
// are not a good idea. We should be migrating away from these.
enum X86ProcFamilyEnum {
Others,
- IntelAtom,
- IntelSLM
+ IntelAtom
};
enum X86SSEEnum {
@@ -506,6 +505,9 @@ class X86Subtarget final : public X86GenSubtargetInfo {
/// Indicates target prefers AVX512 mask registers.
bool PreferMaskRegisters = false;
+ /// Use Silvermont specific arithmetic costs.
+ bool UseSLMArithCosts = false;
+
/// Use Goldmont specific floating point div/sqrt costs.
bool UseGLMDivSqrtCosts = false;
@@ -797,6 +799,7 @@ class X86Subtarget final : public X86GenSubtargetInfo {
}
bool preferMaskRegisters() const { return PreferMaskRegisters; }
+ bool useSLMArithCosts() const { return UseSLMArithCosts; }
bool useGLMDivSqrtCosts() const { return UseGLMDivSqrtCosts; }
bool useLVIControlFlowIntegrity() const { return UseLVIControlFlowIntegrity; }
bool allowTaggedGlobals() const { return AllowTaggedGlobals; }
@@ -833,7 +836,6 @@ class X86Subtarget final : public X86GenSubtargetInfo {
/// TODO: to be removed later and replaced with suitable properties
bool isAtom() const { return X86ProcFamily == IntelAtom; }
- bool isSLM() const { return X86ProcFamily == IntelSLM; }
bool useSoftFloat() const { return UseSoftFloat; }
bool useAA() const override { return UseAA; }
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index cb83f3c17a3c..1a3828f78950 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -314,7 +314,7 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
{ ISD::SUB, MVT::v2i64, 4 },
};
- if (ST->isSLM()) {
+ if (ST->useSLMArithCosts()) {
if (Args.size() == 2 && ISD == ISD::MUL && LT.second == MVT::v4i32) {
// Check if the operands can be shrinked into a smaller datatype.
// TODO: Merge this into generiic vXi32 MUL patterns above.
@@ -2572,7 +2572,7 @@ InstructionCost X86TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
{ ISD::SELECT, MVT::v4f32, 3 }, // andps + andnps + orps
};
- if (ST->isSLM())
+ if (ST->useSLMArithCosts())
if (const auto *Entry = CostTableLookup(SLMCostTbl, ISD, MTy))
return LT.first * (ExtraCost + Entry->Cost);
@@ -3195,7 +3195,7 @@ X86TTIImpl::getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
if (const auto *Entry = CostTableLookup(GLMCostTbl, ISD, MTy))
return adjustTableCost(*Entry, LT.first, ICA.getFlags());
- if (ST->isSLM())
+ if (ST->useSLMArithCosts())
if (const auto *Entry = CostTableLookup(SLMCostTbl, ISD, MTy))
return adjustTableCost(*Entry, LT.first, ICA.getFlags());
@@ -3488,7 +3488,7 @@ InstructionCost X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
int ISD = TLI->InstructionOpcodeToISD(Opcode);
assert(ISD && "Unexpected vector opcode");
MVT MScalarTy = LT.second.getScalarType();
- if (ST->isSLM())
+ if (ST->useSLMArithCosts())
if (auto *Entry = CostTableLookup(SLMCostTbl, ISD, MScalarTy))
return Entry->Cost + RegisterFileMoveCost;
@@ -3905,7 +3905,7 @@ X86TTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *ValTy,
EVT VT = TLI->getValueType(DL, ValTy);
if (VT.isSimple()) {
MVT MTy = VT.getSimpleVT();
- if (ST->isSLM())
+ if (ST->useSLMArithCosts())
if (const auto *Entry = CostTableLookup(SLMCostTblNoPairWise, ISD, MTy))
return Entry->Cost;
@@ -3944,7 +3944,7 @@ X86TTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *ValTy,
ArithmeticCost *= LT.first - 1;
}
- if (ST->isSLM())
+ if (ST->useSLMArithCosts())
if (const auto *Entry = CostTableLookup(SLMCostTblNoPairWise, ISD, MTy))
return ArithmeticCost + Entry->Cost;
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h
index c382cca25b2d..f0f26481ec54 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.h
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h
@@ -80,6 +80,7 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
X86::TuningSlowUAMem16,
X86::TuningPreferMaskRegisters,
X86::TuningInsertVZEROUPPER,
+ X86::TuningUseSLMArithCosts,
X86::TuningUseGLMDivSqrtCosts,
// Perf-tuning flags.
@@ -91,8 +92,7 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
X86::TuningPrefer256Bit,
// CPU name enums. These just follow CPU string.
- X86::ProcIntelAtom,
- X86::ProcIntelSLM,
+ X86::ProcIntelAtom
};
public:
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