[PATCH] D112095: [x86] add special-case lowering for usubsat for pre-SSE4
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 19 13:51:08 PDT 2021
spatel created this revision.
spatel added reviewers: RKSimon, pengfei, craig.topper.
Herald added subscribers: hiraditya, mcrosier.
spatel requested review of this revision.
Herald added a project: LLVM.
usubsat X, SMIN --> (X ^ SMIN) & (X s>> BW-1)
This would be a regression with D112085 <https://reviews.llvm.org/D112085> where we combine to usubsat more aggressively, so avoid that by matching the special-case where we are subtracting SMIN (signmask):
https://alive2.llvm.org/ce/z/4_3gBD
https://reviews.llvm.org/D112095
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/psubus.ll
Index: llvm/test/CodeGen/X86/psubus.ll
===================================================================
--- llvm/test/CodeGen/X86/psubus.ll
+++ llvm/test/CodeGen/X86/psubus.ll
@@ -130,11 +130,9 @@
define <4 x i32> @usubsat_custom(<4 x i32> %x) nounwind {
; SSE2OR3-LABEL: usubsat_custom:
; SSE2OR3: # %bb.0:
-; SSE2OR3-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2OR3-NEXT: pxor %xmm0, %xmm1
-; SSE2OR3-NEXT: pxor %xmm2, %xmm2
-; SSE2OR3-NEXT: pcmpgtd %xmm2, %xmm1
-; SSE2OR3-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE2OR3-NEXT: movdqa %xmm0, %xmm1
+; SSE2OR3-NEXT: psrad $31, %xmm1
+; SSE2OR3-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2OR3-NEXT: pand %xmm1, %xmm0
; SSE2OR3-NEXT: retq
;
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -28135,7 +28135,19 @@
EVT SetCCResultType =
TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
+ unsigned BitWidth = VT.getScalarSizeInBits();
if (Opcode == ISD::USUBSAT && !TLI.isOperationLegal(ISD::UMAX, VT)) {
+ // Handle a special-case with a bit-hack instead of cmp+select:
+ // usubsat X, SMIN --> (X ^ SMIN) & (X s>> BW-1)
+ ConstantSDNode *C = isConstOrConstSplat(Y, true);
+ if (C && C->getAPIntValue().isSignMask()) {
+ SDValue SignMask = DAG.getConstant(C->getAPIntValue(), DL, VT);
+ SDValue ShiftAmt = DAG.getConstant(BitWidth - 1, DL, VT);
+ SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, X, SignMask);
+ SDValue Sra = DAG.getNode(ISD::SRA, DL, VT, X, ShiftAmt);
+ return DAG.getNode(ISD::AND, DL, VT, Xor, Sra);
+ }
+
// usubsat X, Y --> (X >u Y) ? X - Y : 0
SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, X, Y);
SDValue Cmp = DAG.getSetCC(DL, SetCCResultType, X, Y, ISD::SETUGT);
@@ -28148,7 +28160,6 @@
if ((Opcode == ISD::SADDSAT || Opcode == ISD::SSUBSAT) &&
(!VT.isVector() || VT == MVT::v2i64)) {
- unsigned BitWidth = VT.getScalarSizeInBits();
APInt MinVal = APInt::getSignedMinValue(BitWidth);
APInt MaxVal = APInt::getSignedMaxValue(BitWidth);
SDValue Zero = DAG.getConstant(0, DL, VT);
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