[PATCH] D111754: AMDGPU: Fixes for 'LOD bias' operand in ISelDAG path and GobalISel path when A16-bit is 'ON'
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 18 14:26:43 PDT 2021
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
LGTM although I'm not the most familiar person with images
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Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:4245
+ (B.getMRI()->getType(AddrReg) == S16)) {
+ // special handling of bias when A16 is on. Bias is of type half but
+ // occupies full 32-bit.
----------------
Capitalize
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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:6227
+ if (IsA16 && (Op.getOperand(ArgOffset + I).getValueType() == MVT::f16)) {
+ // special handling of bias when A16 is on. Bias is of type half but
+ // occupies full 32-bit.
----------------
Capitalize
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111754/new/
https://reviews.llvm.org/D111754
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