[PATCH] D111467: [RISCV] Rewrite forwardCopyWillClobberTuple to not assume that there are exactly 32 registers. NFC
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 18 10:01:18 PDT 2021
craig.topper added a comment.
In D111467#3067184 <https://reviews.llvm.org/D111467#3067184>, @frasercrmck wrote:
> LGTM. Are there any tests possible for this?
I don't think so. Since our register classes don't wrap around we should never see the wrap this was trying to handle. I think have tests for the different copy directions already though.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111467/new/
https://reviews.llvm.org/D111467
More information about the llvm-commits
mailing list