[PATCH] D111764: [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

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In a kernel which does not have calls or AGPR usage we can allocate
the whole vector register budget for VGPRs and have no AGPRs as
long as VGPRs stay addressable (i.e. below 256).


https://reviews.llvm.org/D111764

Files:
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
  llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
  llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll

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