[llvm] 3274ce3 - [X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 17 07:39:57 PDT 2021
Author: Roman Lebedev
Date: 2021-10-17T17:28:10+03:00
New Revision: 3274ce3a287dcd4d02b4d2c7a2bf60e942836e06
URL: https://github.com/llvm/llvm-project/commit/3274ce3a287dcd4d02b4d2c7a2bf60e942836e06
DIFF: https://github.com/llvm/llvm-project/commit/3274ce3a287dcd4d02b4d2c7a2bf60e942836e06.diff
LOG: [X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs
A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/MTaKboejM - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=16.0`
So could pick cost of `32`
For store we have:
https://godbolt.org/z/v7xPj3Wd4 - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=32.0`
So we could pick cost of `32`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D111944
Added:
Modified:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 7c1a8b522a3a3..0f2d3b26c21f3 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5231,6 +5231,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCost(
{2, MVT::v4i64, 4}, // (load 8i64 and) deinterleave into 2 x 4i64
{2, MVT::v8i64, 8}, // (load 16i64 and) deinterleave into 2 x 8i64
{2, MVT::v16i64, 16}, // (load 32i64 and) deinterleave into 2 x 16i64
+ {2, MVT::v32i64, 32}, // (load 64i64 and) deinterleave into 2 x 32i64
{3, MVT::v2i8, 3}, // (load 6i8 and) deinterleave into 3 x 2i8
{3, MVT::v4i8, 3}, // (load 12i8 and) deinterleave into 3 x 4i8
@@ -5338,6 +5339,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCost(
{2, MVT::v4i64, 4}, // interleave 2 x 4i64 into 8i64 (and store)
{2, MVT::v8i64, 8}, // interleave 2 x 8i64 into 16i64 (and store)
{2, MVT::v16i64, 16}, // interleave 2 x 16i64 into 32i64 (and store)
+ {2, MVT::v32i64, 32}, // interleave 2 x 32i64 into 64i64 (and store)
{3, MVT::v2i8, 4}, // interleave 3 x 2i8 into 6i8 (and store)
{3, MVT::v4i8, 4}, // interleave 3 x 4i8 into 12i8 (and store)
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
index 67629c58d42c9..160ada094daa8 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
@@ -30,7 +30,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 24 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 128 for VF 32 For instruction: %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 48 for VF 32 For instruction: %v0 = load double, double* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
index 84e208971455c..6d24cd248677b 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
@@ -30,7 +30,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 24 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 208 for VF 32 For instruction: %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 48 for VF 32 For instruction: %v0 = load i64, i64* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
index 186cd4a5186ec..de6bfc43c3d79 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
@@ -30,7 +30,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 24 for VF 16 For instruction: store double %v1, double* %out1, align 8
-; AVX2: LV: Found an estimated cost of 128 for VF 32 For instruction: store double %v1, double* %out1, align 8
+; AVX2: LV: Found an estimated cost of 48 for VF 32 For instruction: store double %v1, double* %out1, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v1, double* %out1, align 8
; AVX512: LV: Found an estimated cost of 2 for VF 2 For instruction: store double %v1, double* %out1, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
index 06d1c6e0c8629..0f58fe6c96922 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
@@ -30,7 +30,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 24 for VF 16 For instruction: store i64 %v1, i64* %out1, align 8
-; AVX2: LV: Found an estimated cost of 208 for VF 32 For instruction: store i64 %v1, i64* %out1, align 8
+; AVX2: LV: Found an estimated cost of 48 for VF 32 For instruction: store i64 %v1, i64* %out1, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v1, i64* %out1, align 8
; AVX512: LV: Found an estimated cost of 2 for VF 2 For instruction: store i64 %v1, i64* %out1, align 8
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