[llvm] 2e0fb00 - [llvm][AArch64][SVE] Fold literals into math instructions
David Truby via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 17 03:57:16 PDT 2021
Author: David Truby
Date: 2021-10-17T10:57:04Z
New Revision: 2e0fb007d63cf4d7979c6f6f577e6906145c7b95
URL: https://github.com/llvm/llvm-project/commit/2e0fb007d63cf4d7979c6f6f577e6906145c7b95
DIFF: https://github.com/llvm/llvm-project/commit/2e0fb007d63cf4d7979c6f6f577e6906145c7b95.diff
LOG: [llvm][AArch64][SVE] Fold literals into math instructions
SVE has predicated literal forms of some instructions for specific
literals, which currently are generated correctly when using ACLE
but not when those instructions are generated directly.
This adds the patterns to generate those instructions when
generating from standard LLVM IR instructions.
Differential Revision: https://reviews.llvm.org/D99074
Added:
llvm/test/CodeGen/AArch64/sve-fp-immediates-merging.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll
Modified:
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index 33ce7df2bddad..ecd89b64b8ea3 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1216,6 +1216,18 @@ def fpimm0 : FPImmLeaf<fAny, [{
return Imm.isExactlyValue(+0.0);
}]>;
+def fpimm_half : FPImmLeaf<fAny, [{
+ return Imm.isExactlyValue(+0.5);
+}]>;
+
+def fpimm_one : FPImmLeaf<fAny, [{
+ return Imm.isExactlyValue(+1.0);
+}]>;
+
+def fpimm_two : FPImmLeaf<fAny, [{
+ return Imm.isExactlyValue(+2.0);
+}]>;
+
def gi_fpimm16 : GICustomOperandRenderer<"renderFPImm16">,
GISDNodeXFormEquiv<fpimm16XForm>;
def gi_fpimm32 : GICustomOperandRenderer<"renderFPImm32">,
diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
index 7bd891a2acdc5..cb83f787a5984 100644
--- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -405,14 +405,34 @@ let Predicates = [HasSVEorStreamingSVE] in {
defm FRECPE_ZZ : sve_fp_2op_u_zd<0b110, "frecpe", int_aarch64_sve_frecpe_x>;
defm FRSQRTE_ZZ : sve_fp_2op_u_zd<0b111, "frsqrte", int_aarch64_sve_frsqrte_x>;
- defm FADD_ZPmI : sve_fp_2op_i_p_zds<0b000, "fadd", sve_fpimm_half_one>;
- defm FSUB_ZPmI : sve_fp_2op_i_p_zds<0b001, "fsub", sve_fpimm_half_one>;
- defm FMUL_ZPmI : sve_fp_2op_i_p_zds<0b010, "fmul", sve_fpimm_half_two>;
- defm FSUBR_ZPmI : sve_fp_2op_i_p_zds<0b011, "fsubr", sve_fpimm_half_one>;
- defm FMAXNM_ZPmI : sve_fp_2op_i_p_zds<0b100, "fmaxnm", sve_fpimm_zero_one>;
- defm FMINNM_ZPmI : sve_fp_2op_i_p_zds<0b101, "fminnm", sve_fpimm_zero_one>;
- defm FMAX_ZPmI : sve_fp_2op_i_p_zds<0b110, "fmax", sve_fpimm_zero_one>;
- defm FMIN_ZPmI : sve_fp_2op_i_p_zds<0b111, "fmin", sve_fpimm_zero_one>;
+ defm FADD_ZPmI : sve_fp_2op_i_p_zds<0b000, "fadd", "FADD_ZPZI", sve_fpimm_half_one, fpimm_half, fpimm_one, int_aarch64_sve_fadd>;
+ defm FSUB_ZPmI : sve_fp_2op_i_p_zds<0b001, "fsub", "FSUB_ZPZI", sve_fpimm_half_one, fpimm_half, fpimm_one, int_aarch64_sve_fsub>;
+ defm FMUL_ZPmI : sve_fp_2op_i_p_zds<0b010, "fmul", "FMUL_ZPZI", sve_fpimm_half_two, fpimm_half, fpimm_two, int_aarch64_sve_fmul>;
+ defm FSUBR_ZPmI : sve_fp_2op_i_p_zds<0b011, "fsubr", "FSUBR_ZPZI", sve_fpimm_half_one, fpimm_half, fpimm_one, int_aarch64_sve_fsubr>;
+ defm FMAXNM_ZPmI : sve_fp_2op_i_p_zds<0b100, "fmaxnm", "FMAXNM_ZPZI", sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fmaxnm>;
+ defm FMINNM_ZPmI : sve_fp_2op_i_p_zds<0b101, "fminnm", "FMINNM_ZPZI", sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fminnm>;
+ defm FMAX_ZPmI : sve_fp_2op_i_p_zds<0b110, "fmax", "FMAX_ZPZI", sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fmax>;
+ defm FMIN_ZPmI : sve_fp_2op_i_p_zds<0b111, "fmin", "FMIN_ZPZI", sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fmin>;
+
+ defm FADD_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_half_one, fpimm_half, fpimm_one, AArch64fadd_p>;
+ defm FSUB_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_half_one, fpimm_half, fpimm_one, AArch64fsub_p>;
+ defm FMUL_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_half_two, fpimm_half, fpimm_two, AArch64fmul_p>;
+ defm FSUBR_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_half_one, fpimm_half, fpimm_one>;
+ defm FMAXNM_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, AArch64fmaxnm_p>;
+ defm FMINNM_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, AArch64fminnm_p>;
+ defm FMAX_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, AArch64fmax_p>;
+ defm FMIN_ZPZI : sve_fp_2op_i_p_zds_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, AArch64fmin_p>;
+
+ let Predicates = [HasSVE, UseExperimentalZeroingPseudos] in {
+ defm FADD_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_half_one, fpimm_half, fpimm_one, int_aarch64_sve_fadd>;
+ defm FSUB_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_half_one, fpimm_half, fpimm_one, int_aarch64_sve_fsub>;
+ defm FMUL_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_half_two, fpimm_half, fpimm_two, int_aarch64_sve_fmul>;
+ defm FSUBR_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_half_one, fpimm_half, fpimm_one, int_aarch64_sve_fsubr>;
+ defm FMAXNM_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fmaxnm>;
+ defm FMINNM_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fminnm>;
+ defm FMAX_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fmax>;
+ defm FMIN_ZPZI : sve_fp_2op_i_p_zds_zeroing_hfd<sve_fpimm_zero_one, fpimm0, fpimm_one, int_aarch64_sve_fmin>;
+ }
defm FADD_ZPmZ : sve_fp_2op_p_zds<0b0000, "fadd", "FADD_ZPZZ", int_aarch64_sve_fadd, DestructiveBinaryComm>;
defm FSUB_ZPmZ : sve_fp_2op_p_zds<0b0001, "fsub", "FSUB_ZPZZ", int_aarch64_sve_fsub, DestructiveBinaryCommWithRev, "FSUBR_ZPmZ">;
diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td
index 490e08a89471c..fcb96c3b19db9 100644
--- a/llvm/lib/Target/AArch64/SVEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td
@@ -490,6 +490,21 @@ class SVE_Shift_DupImm_All_Active_Pat<ValueType vt, SDPatternOperator op,
: Pat<(vt (op (pt (SVEAllActive)), vt:$Rn, (vt (AArch64dup (it (cast i32:$imm)))))),
(inst $Rn, i32:$imm)>;
+class SVE_2_Op_Fp_Imm_Pat<ValueType vt, SDPatternOperator op,
+ ValueType pt, ValueType it,
+ FPImmLeaf immL, int imm,
+ Instruction inst>
+: Pat<(vt (op (pt PPR_3b:$Pg), (vt ZPR:$Zs1), (vt (AArch64dup (it immL))))),
+ (inst $Pg, $Zs1, imm)>;
+
+class SVE_2_Op_Fp_Imm_Pat_Zero<ValueType vt, SDPatternOperator op,
+ ValueType pt, ValueType it,
+ FPImmLeaf immL, int imm,
+ Instruction inst>
+: Pat<(vt (op pt:$Pg, (vselect pt:$Pg, vt:$Zs1, (SVEDup0)),
+ (vt (AArch64dup (it immL))))),
+ (inst $Pg, $Zs1, imm)>;
+
//
// Pseudo -> Instruction mappings
//
@@ -1745,10 +1760,19 @@ class sve_fp_2op_i_p_zds<bits<2> sz, bits<3> opc, string asm,
let ElementSize = zprty.ElementSize;
}
-multiclass sve_fp_2op_i_p_zds<bits<3> opc, string asm, Operand imm_ty> {
- def _H : sve_fp_2op_i_p_zds<0b01, opc, asm, ZPR16, imm_ty>;
- def _S : sve_fp_2op_i_p_zds<0b10, opc, asm, ZPR32, imm_ty>;
- def _D : sve_fp_2op_i_p_zds<0b11, opc, asm, ZPR64, imm_ty>;
+multiclass sve_fp_2op_i_p_zds<bits<3> opc, string asm, string Ps, Operand imm_ty, FPImmLeaf A, FPImmLeaf B, SDPatternOperator op> {
+ let DestructiveInstType = DestructiveBinaryImm in {
+ def _H : SVEPseudo2Instr<Ps # _H, 1>, sve_fp_2op_i_p_zds<0b01, opc, asm, ZPR16, imm_ty>;
+ def _S : SVEPseudo2Instr<Ps # _S, 1>, sve_fp_2op_i_p_zds<0b10, opc, asm, ZPR32, imm_ty>;
+ def _D : SVEPseudo2Instr<Ps # _D, 1>, sve_fp_2op_i_p_zds<0b11, opc, asm, ZPR64, imm_ty>;
+ }
+
+ def : SVE_2_Op_Fp_Imm_Pat<nxv8f16, op, nxv8i1, f16, A, 0, !cast<Instruction>(NAME # "_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv8f16, op, nxv8i1, f16, B, 1, !cast<Instruction>(NAME # "_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv4f32, op, nxv4i1, f32, A, 0, !cast<Instruction>(NAME # "_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv4f32, op, nxv4i1, f32, B, 1, !cast<Instruction>(NAME # "_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f64, op, nxv2i1, f64, A, 0, !cast<Instruction>(NAME # "_D")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f64, op, nxv2i1, f64, B, 1, !cast<Instruction>(NAME # "_D")>;
}
class sve_fp_2op_p_zds<bits<2> sz, bits<4> opc, string asm,
@@ -1846,6 +1870,40 @@ multiclass sve_fp_ftmad<string asm, SDPatternOperator op> {
(!cast<Instruction>(NAME # _D) ZPR64:$Zn, ZPR64:$Zm, imm32_0_7:$imm)>;
}
+multiclass sve_fp_2op_i_p_zds_hfd<Operand imm_ty, FPImmLeaf A, FPImmLeaf B, SDPatternOperator ir_op = null_frag> {
+ def _UNDEF_H : PredTwoOpImmPseudo<NAME # _H, ZPR16, imm_ty, FalseLanesUndef>;
+ def _UNDEF_S : PredTwoOpImmPseudo<NAME # _S, ZPR32, imm_ty, FalseLanesUndef>;
+ def _UNDEF_D : PredTwoOpImmPseudo<NAME # _D, ZPR64, imm_ty, FalseLanesUndef>;
+
+ def : SVE_2_Op_Fp_Imm_Pat<nxv8f16, ir_op, nxv8i1, f16, A, 0, !cast<Instruction>(NAME # "_UNDEF_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv8f16, ir_op, nxv8i1, f16, B, 1, !cast<Instruction>(NAME # "_UNDEF_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv4f16, ir_op, nxv4i1, f16, A, 0, !cast<Instruction>(NAME # "_UNDEF_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv4f16, ir_op, nxv4i1, f16, B, 1, !cast<Instruction>(NAME # "_UNDEF_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f16, ir_op, nxv2i1, f16, A, 0, !cast<Instruction>(NAME # "_UNDEF_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f16, ir_op, nxv2i1, f16, B, 1, !cast<Instruction>(NAME # "_UNDEF_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv4f32, ir_op, nxv4i1, f32, A, 0, !cast<Instruction>(NAME # "_UNDEF_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv4f32, ir_op, nxv4i1, f32, B, 1, !cast<Instruction>(NAME # "_UNDEF_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f32, ir_op, nxv2i1, f32, A, 0, !cast<Instruction>(NAME # "_UNDEF_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f32, ir_op, nxv2i1, f32, B, 1, !cast<Instruction>(NAME # "_UNDEF_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f64, ir_op, nxv2i1, f64, A, 0, !cast<Instruction>(NAME # "_UNDEF_D")>;
+ def : SVE_2_Op_Fp_Imm_Pat<nxv2f64, ir_op, nxv2i1, f64, B, 1, !cast<Instruction>(NAME # "_UNDEF_D")>;
+}
+
+multiclass sve_fp_2op_i_p_zds_zeroing_hfd<Operand imm_ty, FPImmLeaf A, FPImmLeaf B, SDPatternOperator op> {
+ def _ZERO_H : PredTwoOpImmPseudo<NAME # _H, ZPR16, imm_ty, FalseLanesZero>;
+ def _ZERO_S : PredTwoOpImmPseudo<NAME # _S, ZPR32, imm_ty, FalseLanesZero>;
+ def _ZERO_D : PredTwoOpImmPseudo<NAME # _D, ZPR64, imm_ty, FalseLanesZero>;
+
+ let AddedComplexity = 2 in {
+ def : SVE_2_Op_Fp_Imm_Pat_Zero<nxv8f16, op, nxv8i1, f16, A, 0, !cast<Instruction>(NAME # "_ZERO_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat_Zero<nxv8f16, op, nxv8i1, f16, B, 1, !cast<Instruction>(NAME # "_ZERO_H")>;
+ def : SVE_2_Op_Fp_Imm_Pat_Zero<nxv4f32, op, nxv4i1, f32, A, 0, !cast<Instruction>(NAME # "_ZERO_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat_Zero<nxv4f32, op, nxv4i1, f32, B, 1, !cast<Instruction>(NAME # "_ZERO_S")>;
+ def : SVE_2_Op_Fp_Imm_Pat_Zero<nxv2f64, op, nxv2i1, f64, A, 0, !cast<Instruction>(NAME # "_ZERO_D")>;
+ def : SVE_2_Op_Fp_Imm_Pat_Zero<nxv2f64, op, nxv2i1, f64, B, 1, !cast<Instruction>(NAME # "_ZERO_D")>;
+ }
+}
+
//===----------------------------------------------------------------------===//
// SVE Floating Point Arithmetic - Unpredicated Group
//===----------------------------------------------------------------------===//
@@ -8371,3 +8429,4 @@ multiclass sve_int_bin_pred_all_active_bhsd<SDPatternOperator op> {
def : SVE_2_Op_Pred_All_Active_Pt<nxv4i32, op, nxv4i1, nxv4i32, nxv4i32, !cast<Pseudo>(NAME # _UNDEF_S)>;
def : SVE_2_Op_Pred_All_Active_Pt<nxv2i64, op, nxv2i1, nxv2i64, nxv2i64, !cast<Pseudo>(NAME # _UNDEF_D)>;
}
+
diff --git a/llvm/test/CodeGen/AArch64/sve-fp-immediates-merging.ll b/llvm/test/CodeGen/AArch64/sve-fp-immediates-merging.ll
new file mode 100644
index 0000000000000..8c688e6266924
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/sve-fp-immediates-merging.ll
@@ -0,0 +1,1071 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+;
+; FADD
+;
+
+define <vscale x 8 x half> @fadd_h_immhalf(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fadd_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = fadd <vscale x 8 x half> %a, %splat
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fadd_h_immone(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fadd_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = fadd <vscale x 8 x half> %a, %splat
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fadd_4h_immhalf(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fadd_4h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fadd <vscale x 4 x half> %a, %splat
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fadd_4h_immone(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fadd_4h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fadd <vscale x 4 x half> %a, %splat
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fadd_2h_immhalf(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fadd_2h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fadd <vscale x 2 x half> %a, %splat
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fadd_2h_immone(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fadd_2h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fadd <vscale x 2 x half> %a, %splat
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fadd_s_immhalf(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fadd_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fadd <vscale x 4 x float> %a, %splat
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fadd_s_immone(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fadd_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fadd <vscale x 4 x float> %a, %splat
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fadd_2s_immhalf(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fadd_2s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fadd <vscale x 2 x float> %a, %splat
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fadd_2s_immone(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fadd_2s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fadd <vscale x 2 x float> %a, %splat
+ ret <vscale x 2 x float> %out
+}
+
+
+define <vscale x 2 x double> @fadd_d_immhalf(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fadd_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fadd <vscale x 2 x double> %a, %splat
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fadd_d_immone(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fadd_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fadd <vscale x 2 x double> %a, %splat
+ ret <vscale x 2 x double> %out
+}
+
+;
+; FMAX
+;
+
+define <vscale x 8 x half> @fmax_h_immzero(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmax_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.maximum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmax_h_immone(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmax_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.maximum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fmax_4h_immzero(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmax_4h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.maximum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fmax_4h_immone(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmax_4h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.maximum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fmax_2h_immzero(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmax_2h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.maximum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fmax_2h_immone(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmax_2h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.maximum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fmax_s_immzero(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmax_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.maximum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmax_s_immone(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmax_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.maximum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fmax_2s_immzero(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmax_2s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.maximum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fmax_2s_immone(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmax_2s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.maximum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x double> @fmax_d_immzero(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmax_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.maximum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmax_d_immone(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmax_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.maximum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+;
+; FMAXNM
+;
+
+define <vscale x 8 x half> @fmaxnm_h_immzero(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.maxnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmaxnm_h_immone(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.maxnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fmaxnm_4h_immzero(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_4h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fmaxnm_4h_immone(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_4h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fmaxnm_2h_immzero(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_2h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.maxnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fmaxnm_2h_immone(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_2h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.maxnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fmaxnm_s_immzero(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmaxnm_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmaxnm_s_immone(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmaxnm_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fmaxnm_2s_immzero(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmaxnm_2s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.maxnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fmaxnm_2s_immone(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmaxnm_2s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.maxnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x double> @fmaxnm_d_immzero(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmaxnm_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmaxnm_d_immone(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmaxnm_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+;
+; FMIN
+;
+
+define <vscale x 8 x half> @fmin_h_immzero(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmin_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.minimum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmin_h_immone(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmin_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.minimum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fmin_4h_immzero(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmin_4h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.minimum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fmin_4h_immone(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmin_4h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.minimum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fmin_2h_immzero(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmin_2h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.minimum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fmin_2h_immone(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmin_2h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.minimum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fmin_s_immzero(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmin_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.minimum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmin_s_immone(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmin_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.minimum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fmin_2s_immzero(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmin_2s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.minimum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fmin_2s_immone(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmin_2s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.minimum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x double> @fmin_d_immzero(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmin_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.minimum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmin_d_immone(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmin_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.minimum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+;
+; FMINNM
+;
+
+define <vscale x 8 x half> @fminnm_h_immzero(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fminnm_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.minnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fminnm_h_immone(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fminnm_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.minnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fminnm_4h_immzero(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fminnm_4h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fminnm_4h_immone(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fminnm_4h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fminnm_2h_immzero(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fminnm_2h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.minnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fminnm_2h_immone(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fminnm_2h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x half> @llvm.minnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fminnm_s_immzero(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fminnm_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fminnm_s_immone(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fminnm_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fminnm_2s_immzero(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fminnm_2s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.minnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fminnm_2s_immone(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fminnm_2s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x float> @llvm.minnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x double> @fminnm_d_immzero(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fminnm_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fminnm_d_immone(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fminnm_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+;
+; FMUL
+;
+
+define <vscale x 8 x half> @fmul_h_immhalf(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmul_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = fmul <vscale x 8 x half> %a, %splat
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmul_h_immtwo(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmul_h_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.h, z0.h, z0.h
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = fmul <vscale x 8 x half> %a, %splat
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fmul_4h_immhalf(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmul_4h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fmul <vscale x 4 x half> %a, %splat
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fmul_4h_immtwo(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fmul_4h_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z0.h
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fmul <vscale x 4 x half> %a, %splat
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fmul_2h_immhalf(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmul_2h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fmul <vscale x 2 x half> %a, %splat
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fmul_2h_immtwo(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fmul_2h_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z0.h
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fmul <vscale x 2 x half> %a, %splat
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fmul_s_immhalf(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmul_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fmul <vscale x 4 x float> %a, %splat
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmul_s_immtwo(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmul_s_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.s, z0.s, z0.s
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fmul <vscale x 4 x float> %a, %splat
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fmul_2s_immhalf(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmul_2s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fmul <vscale x 2 x float> %a, %splat
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fmul_2s_immtwo(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fmul_2s_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z0.s
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fmul <vscale x 2 x float> %a, %splat
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x double> @fmul_d_immhalf(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmul_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fmul <vscale x 2 x double> %a, %splat
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmul_d_immtwo(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmul_d_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.d, z0.d, z0.d
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fmul <vscale x 2 x double> %a, %splat
+ ret <vscale x 2 x double> %out
+}
+
+;
+; FSUB
+;
+
+define <vscale x 8 x half> @fsub_h_immhalf(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fsub_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = fsub <vscale x 8 x half> %a, %splat
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fsub_h_immone(<vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fsub_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.h
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = fsub <vscale x 8 x half> %a, %splat
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x half> @fsub_4h_immhalf(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fsub_4h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fsub <vscale x 4 x half> %a, %splat
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 4 x half> @fsub_4h_immone(<vscale x 4 x half> %a) #0 {
+; CHECK-LABEL: fsub_4h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x half> %elt, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fsub <vscale x 4 x half> %a, %splat
+ ret <vscale x 4 x half> %out
+}
+
+define <vscale x 2 x half> @fsub_2h_immhalf(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fsub_2h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fsub <vscale x 2 x half> %a, %splat
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 2 x half> @fsub_2h_immone(<vscale x 2 x half> %a) #0 {
+; CHECK-LABEL: fsub_2h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x half> %elt, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fsub <vscale x 2 x half> %a, %splat
+ ret <vscale x 2 x half> %out
+}
+
+define <vscale x 4 x float> @fsub_s_immhalf(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fsub_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fsub <vscale x 4 x float> %a, %splat
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fsub_s_immone(<vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fsub_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.s
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = fsub <vscale x 4 x float> %a, %splat
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x float> @fsub_2s_immhalf(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fsub_2s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fsub <vscale x 2 x float> %a, %splat
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x float> @fsub_2s_immone(<vscale x 2 x float> %a) #0 {
+; CHECK-LABEL: fsub_2s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x float> %elt, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fsub <vscale x 2 x float> %a, %splat
+ ret <vscale x 2 x float> %out
+}
+
+define <vscale x 2 x double> @fsub_d_immhalf(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fsub_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fsub <vscale x 2 x double> %a, %splat
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fsub_d_immone(<vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fsub_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = fsub <vscale x 2 x double> %a, %splat
+ ret <vscale x 2 x double> %out
+}
+
+;; Arithmetic intrinsic declarations
+
+declare <vscale x 8 x half> @llvm.maximum.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x half> @llvm.maximum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
+declare <vscale x 2 x half> @llvm.maximum.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>)
+declare <vscale x 4 x float> @llvm.maximum.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x float> @llvm.maximum.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>)
+declare <vscale x 2 x double> @llvm.maximum.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.maxnum.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
+declare <vscale x 2 x half> @llvm.maxnum.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>)
+declare <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x float> @llvm.maxnum.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>)
+declare <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.minimum.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x half> @llvm.minimum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
+declare <vscale x 2 x half> @llvm.minimum.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>)
+declare <vscale x 4 x float> @llvm.minimum.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x float> @llvm.minimum.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>)
+declare <vscale x 2 x double> @llvm.minimum.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.minnum.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
+declare <vscale x 2 x half> @llvm.minnum.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>)
+declare <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x float> @llvm.minnum.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>)
+declare <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
+
+attributes #0 = { "target-features"="+sve" }
+attributes #1 = { "target-features"="+sve,+use-experimental-zeroing-pseudos" }
diff --git a/llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll b/llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll
new file mode 100644
index 0000000000000..eea6031fbd6b5
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll
@@ -0,0 +1,1309 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define <vscale x 8 x half> @fadd_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fadd_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+
+define <vscale x 8 x half> @fadd_h_immhalf_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fadd_h_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fadd_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fadd_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fadd_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fadd_h_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fadd_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fadd_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fadd_s_immhalf_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fadd_s_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fadd_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fadd_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fadd_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fadd_s_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fadd_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fadd_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fadd_d_immhalf_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fadd_d_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fadd_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fadd_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fadd_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fadd_d_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fmax_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmax_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmax_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmax_h_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmax_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmax_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmax_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmax_h_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fmax_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmax_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmax_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmax_s_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmax_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmax_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmax_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmax_s_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fmax_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmax_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmax_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmax_d_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmax_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmax_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmax_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmax_d_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fmaxnm_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmaxnm_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmaxnm_h_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmaxnm_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmaxnm_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmaxnm_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmaxnm_h_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fmaxnm_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmaxnm_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmaxnm_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmaxnm_s_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmaxnm_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmaxnm_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmaxnm_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmaxnm_s_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fmaxnm_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmaxnm_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmaxnm_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmaxnm_d_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmaxnm_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmaxnm_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmaxnm_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmaxnm_d_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fmin_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmin_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmin_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmin_h_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmin_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmin_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmin_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmin_h_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fmin_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmin_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmin_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmin_s_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmin_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmin_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmin_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmin_s_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fmin_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmin_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmin_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmin_d_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmin_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmin_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmin_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmin_d_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fminnm_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fminnm_h_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fminnm_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fminnm_h_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fminnm_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fminnm_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fminnm_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fminnm_h_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fminnm_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fminnm_s_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fminnm_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fminnm_s_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fminnm_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fminnm_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fminnm_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fminnm_s_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fminnm_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fminnm_d_immzero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fminnm_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fminnm_d_immzero_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fminnm_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fminnm_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fminnm_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fminnm_d_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fmul_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmul_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmul_h_immhalf_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmul_h_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmul_h_immtwo(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fmul_h_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fmul_h_immtwo_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fmul_h_immtwo_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fmul_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmul_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmul_s_immhalf_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmul_s_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmul_s_immtwo(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fmul_s_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #2.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fmul_s_immtwo_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fmul_s_immtwo_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #2.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fmul_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmul_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmul_d_immhalf_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmul_d_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmul_d_immtwo(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fmul_d_immtwo:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #2.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fmul_d_immtwo_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fmul_d_immtwo_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #2.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 2.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fsub_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fsub_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fsub_h_immhalf_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fsub_h_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fsub_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {
+; CHECK-LABEL: fsub_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fsub_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fsub_h_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fsub_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fsub_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fsub_s_immhalf_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fsub_s_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fsub_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {
+; CHECK-LABEL: fsub_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fsub_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fsub_s_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fsub_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fsub_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fsub_d_immhalf_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fsub_d_immhalf_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fsub_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {
+; CHECK-LABEL: fsub_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fsub_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fsub_d_immone_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 8 x half> @fsubr_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fsubr_h_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 8 x half> @fsubr_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {
+; CHECK-LABEL: fsubr_h_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
+; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 8 x half> undef, half 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 8 x half> %elt, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
+ %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
+ %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg,
+ <vscale x 8 x half> %a_z,
+ <vscale x 8 x half> %splat)
+ ret <vscale x 8 x half> %out
+}
+
+define <vscale x 4 x float> @fsubr_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fsubr_s_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 4 x float> @fsubr_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {
+; CHECK-LABEL: fsubr_s_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.s, p0/z, z0.s
+; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 4 x float> undef, float 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 4 x float> %elt, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
+ %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer
+ %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %pg,
+ <vscale x 4 x float> %a_z,
+ <vscale x 4 x float> %splat)
+ ret <vscale x 4 x float> %out
+}
+
+define <vscale x 2 x double> @fsubr_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fsubr_d_immhalf:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, #0.5
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 0.500000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+define <vscale x 2 x double> @fsubr_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {
+; CHECK-LABEL: fsubr_d_immone:
+; CHECK: // %bb.0:
+; CHECK-NEXT: movprfx z0.d, p0/z, z0.d
+; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, #1.0
+; CHECK-NEXT: ret
+ %elt = insertelement <vscale x 2 x double> undef, double 1.000000e+00, i32 0
+ %splat = shufflevector <vscale x 2 x double> %elt, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
+ %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer
+ %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %pg,
+ <vscale x 2 x double> %a_z,
+ <vscale x 2 x double> %splat)
+ ret <vscale x 2 x double> %out
+}
+
+
+;; Arithmetic intrinsic declarations
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+declare <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+declare <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
+declare <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
+
+attributes #0 = { "target-features"="+sve" }
+attributes #1 = { "target-features"="+sve,+use-experimental-zeroing-pseudos" }
More information about the llvm-commits
mailing list