[PATCH] D111941: [X86][Costmodel] Add SSE2 sub-128bit vXi8/16/32 and 128/256-bit vXi32/64 stride 2 interleaved load costs

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added a reviewer: lebedev.ri.
Herald added subscribers: pengfei, hiraditya.
RKSimon requested review of this revision.
Herald added a project: LLVM.

These all expand to 1 or 2 UNPCK shuffle ops. AVX1/AVX2 sometimes expands to a subvector-concat + permute pattern instead but the costs turn out to be very similar, so move them from the AVX2 to the SSE2 cost table.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111941

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D111941.380193.patch
Type: text/x-patch
Size: 15179 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211016/1bef10a2/attachment.bin>