[PATCH] D111630: [LoopVectorize][CostModel] Update cost model for fmuladd intrinsic
Rosie Sumpter via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 15 05:47:58 PDT 2021
RosieSumpter added inline comments.
================
Comment at: llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll:398
; CHECK-ORDERED: [[VEC_PHI:%.*]] = phi float [ 0.000000e+00, %vector.ph ], [ [[RDX2:%.*]], %vector.body ]
-; CHECK-ORDERED: [[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD1:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD3:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD4:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD5:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD6:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[WIDE_LOAD7:%.*]] = load <4 x float>, <4 x float>*
-; CHECK-ORDERED: [[FMUL:%.*]] = fmul <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD4]]
-; CHECK-ORDERED: [[RDX:%.*]] = call float @llvm.vector.reduce.fadd.v4f32(float [[VEC_PHI]], <4 x float> [[FMUL]])
-; CHECK-ORDERED: [[FMUL1:%.*]] = fmul <4 x float> [[WIDE_LOAD1]], [[WIDE_LOAD5]]
-; CHECK-ORDERED: [[RDX1:%.*]] = call float @llvm.vector.reduce.fadd.v4f32(float [[RDX]], <4 x float> [[FMUL1]])
-; CHECK-ORDERED: [[FMUL2:%.*]] = fmul <4 x float> [[WIDE_LOAD2]], [[WIDE_LOAD6]]
-; CHECK-ORDERED: [[RDX2:%.*]] = call float @llvm.vector.reduce.fadd.v4f32(float [[RDX1]], <4 x float> [[FMUL2]])
-; CHECK-ORDERED: [[FMUL3:%.*]] = fmul <4 x float> [[WIDE_LOAD3]], [[WIDE_LOAD7]]
-; CHECK-ORDERED: [[RDX3:%.*]] = call float @llvm.vector.reduce.fadd.v4f32(float [[RDX2]], <4 x float> [[FMUL3]])
+; CHECK-ORDERED: [[WIDE_LOAD:%.*]] = load <vscale x 8 x float>, <vscale x 8 x float>*
+; CHECK-ORDERED: [[WIDE_LOAD1:%.*]] = load <vscale x 8 x float>, <vscale x 8 x float>*
----------------
david-arm wrote:
> Hi @RosieSumpter, do you know why these CHECK lines have changed? It doesn't seem like your patch should affect these tests because these loops are forced to use a certain VF anyway.
Hi @david-arm, good point. The reason the test has changed is because of adding ##FMulAdd## as an allowed recurrence kind to ##AArch64TTIImpl::isLegalToVectorizeReduction##. I now see that it probably makes more sense for this particular change to be in D111555, so I'll do that now.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111630/new/
https://reviews.llvm.org/D111630
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