[llvm] 9e9b0f4 - [PowerPC] Support ppc-asm-full-reg-names for AIX
Qiu Chaofan via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 14 21:23:56 PDT 2021
Author: Qiu Chaofan
Date: 2021-10-15T12:22:44+08:00
New Revision: 9e9b0f462146e91570f8a4d86611d737f65b0404
URL: https://github.com/llvm/llvm-project/commit/9e9b0f462146e91570f8a4d86611d737f65b0404
DIFF: https://github.com/llvm/llvm-project/commit/9e9b0f462146e91570f8a4d86611d737f65b0404.diff
LOG: [PowerPC] Support ppc-asm-full-reg-names for AIX
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D94282
Added:
Modified:
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cmpb-32.ll
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
llvm/test/CodeGen/PowerPC/reg-names.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
index 5a8f192dd1aca..67c02c17bc460 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -631,8 +631,6 @@ const char *PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
// showRegistersWithPrefix - This method determines whether registers
// should be number-only or include the prefix.
bool PPCInstPrinter::showRegistersWithPrefix() const {
- if (TT.getOS() == Triple::AIX)
- return false;
return FullRegNamesWithPercent || FullRegNames;
}
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cmpb-32.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cmpb-32.ll
index 9a5102c7cef79..8f09af96a3ce3 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cmpb-32.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-cmpb-32.ll
@@ -5,8 +5,8 @@
define i64 @test_cmpb(i64 %a, i64 %b) {
; CHECK-LABEL: test_cmpb:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cmpb 4, 4, 6
-; CHECK-NEXT: cmpb 3, 3, 5
+; CHECK-NEXT: cmpb r4, r4, r6
+; CHECK-NEXT: cmpb r3, r3, r5
; CHECK-NEXT: blr
entry:
%0 = trunc i64 %a to i32
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
index 58e7b729cd436..771c176b80bec 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
@@ -5,7 +5,7 @@
define dso_local i32 @test_builtin_ppc_popcntb_i32(i32 %a) local_unnamed_addr {
; CHECK-LABEL: test_builtin_ppc_popcntb_i32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: popcntb 3, 3
+; CHECK-NEXT: popcntb r3, r3
; CHECK-NEXT: blr
entry:
%popcntb = tail call i32 @llvm.ppc.popcntb.i32.i32(i32 %a)
@@ -16,8 +16,8 @@ declare i32 @llvm.ppc.popcntb.i32.i32(i32)
define dso_local void @test_builtin_ppc_eieio() {
; CHECK-LABEL: test_builtin_ppc_eieio:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: ori 2, 2, 0
-; CHECK-NEXT: ori 2, 2, 0
+; CHECK-NEXT: ori r2, r2, 0
+; CHECK-NEXT: ori r2, r2, 0
; CHECK-NEXT: eieio
; CHECK-NEXT: blr
entry:
@@ -29,8 +29,8 @@ declare void @llvm.ppc.eieio()
define dso_local void @test_builtin_ppc_iospace_eieio() {
; CHECK-LABEL: test_builtin_ppc_iospace_eieio:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: ori 2, 2, 0
-; CHECK-NEXT: ori 2, 2, 0
+; CHECK-NEXT: ori r2, r2, 0
+; CHECK-NEXT: ori r2, r2, 0
; CHECK-NEXT: eieio
; CHECK-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
index c31c53402e631..d54d679e78f07 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
@@ -14,7 +14,7 @@ define dso_local i64 @test_builtin_ppc_popcntb_i64(i64 %a) local_unnamed_addr {
;
; CHECK-AIX-LABEL: test_builtin_ppc_popcntb_i64:
; CHECK-AIX: # %bb.0: # %entry
-; CHECK-AIX-NEXT: popcntb 3, 3
+; CHECK-AIX-NEXT: popcntb r3, r3
; CHECK-AIX-NEXT: blr
entry:
%popcntb = tail call i64 @llvm.ppc.popcntb.i64.i64(i64 %a)
@@ -32,8 +32,8 @@ define dso_local void @test_builtin_ppc_eieio() {
;
; CHECK-AIX-LABEL: test_builtin_ppc_eieio:
; CHECK-AIX: # %bb.0: # %entry
-; CHECK-AIX-NEXT: ori 2, 2, 0
-; CHECK-AIX-NEXT: ori 2, 2, 0
+; CHECK-AIX-NEXT: ori r2, r2, 0
+; CHECK-AIX-NEXT: ori r2, r2, 0
; CHECK-AIX-NEXT: eieio
; CHECK-AIX-NEXT: blr
entry:
@@ -52,8 +52,8 @@ define dso_local void @test_builtin_ppc_iospace_eieio() {
;
; CHECK-AIX-LABEL: test_builtin_ppc_iospace_eieio:
; CHECK-AIX: # %bb.0: # %entry
-; CHECK-AIX-NEXT: ori 2, 2, 0
-; CHECK-AIX-NEXT: ori 2, 2, 0
+; CHECK-AIX-NEXT: ori r2, r2, 0
+; CHECK-AIX-NEXT: ori r2, r2, 0
; CHECK-AIX-NEXT: eieio
; CHECK-AIX-NEXT: blr
entry:
@@ -103,8 +103,8 @@ define dso_local void @test_builtin_ppc_icbt() {
;
; CHECK-AIX-LABEL: test_builtin_ppc_icbt:
; CHECK-AIX: # %bb.0: # %entry
-; CHECK-AIX-NEXT: ld 3, -8(1)
-; CHECK-AIX-NEXT: icbt 0, 0, 3
+; CHECK-AIX-NEXT: ld r3, -8(r1)
+; CHECK-AIX-NEXT: icbt 0, 0, r3
; CHECK-AIX-NEXT: blr
entry:
%a = alloca i8*, align 8
diff --git a/llvm/test/CodeGen/PowerPC/reg-names.ll b/llvm/test/CodeGen/PowerPC/reg-names.ll
index 70c3b6087d489..91cdb05ec9f74 100644
--- a/llvm/test/CodeGen/PowerPC/reg-names.ll
+++ b/llvm/test/CodeGen/PowerPC/reg-names.ll
@@ -1,5 +1,6 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck -check-prefix=CHECK-FN %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -ppc-asm-full-reg-names < %s | FileCheck -check-prefix=CHECK-FN %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -ppc-reg-with-percent-prefix < %s | FileCheck -check-prefix=CHECK-PN %s
define i64 @test1(i64 %a, i64 %b) {
More information about the llvm-commits
mailing list