[PATCH] D111804: [InstCombine] Don't combine CmpInst that used for verify the legality of the lshr

[Tiehu Zhang via Phabricator via llvm-commits]

TiehuZhang added a comment.

In D111804#3065906 <https://reviews.llvm.org/D111804#3065906>, @craig.topper wrote:

> If an input to an `or` instruction is poison, the output of the `or` is poison regardless of whether the other operand is true when the poison result occurs.
>
> If an incorrect optimization is occurring it must be where the `or` is created.

Thanks for your review! @craig.topper. Do you mean that we should prevent this pattern from being generated, rather than remedying it after the pattern is generated?  Actually, the issue I met started from D95959 <https://reviews.llvm.org/D95959>. That optimization does not seem to apply to all scenarios, such as those where the shift operand is negative. In the case I present, this optimization results in a miscalculation of the KnownBit, which in turn results in a miscalculated optimization.


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