[llvm] e9e6266 - [AArch64] Add extra tests for fptosisat vector variants

David Green via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 14 13:26:30 PDT 2021


Author: David Green
Date: 2021-10-14T21:26:24+01:00
New Revision: e9e6266c704df43e2c52308e1b653dccefa89e04

URL: https://github.com/llvm/llvm-project/commit/e9e6266c704df43e2c52308e1b653dccefa89e04
DIFF: https://github.com/llvm/llvm-project/commit/e9e6266c704df43e2c52308e1b653dccefa89e04.diff

LOG: [AArch64] Add extra tests for fptosisat vector variants

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
    llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll b/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
index c74c9a0cb28ff..b47cc04e29079 100644
--- a/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
+++ b/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
@@ -1144,701 +1144,2054 @@ define <2 x i128> @test_signed_v2f32_v2i128(<2 x float> %f) {
 }
 
 ;
-; 2-Vector double to signed integer -- result size variation
+; 4-Vector float to signed integer -- result size variation
 ;
 
-declare <2 x   i1> @llvm.fptosi.sat.v2f64.v2i1  (<2 x double>)
-declare <2 x   i8> @llvm.fptosi.sat.v2f64.v2i8  (<2 x double>)
-declare <2 x  i13> @llvm.fptosi.sat.v2f64.v2i13 (<2 x double>)
-declare <2 x  i16> @llvm.fptosi.sat.v2f64.v2i16 (<2 x double>)
-declare <2 x  i19> @llvm.fptosi.sat.v2f64.v2i19 (<2 x double>)
-declare <2 x  i50> @llvm.fptosi.sat.v2f64.v2i50 (<2 x double>)
-declare <2 x  i64> @llvm.fptosi.sat.v2f64.v2i64 (<2 x double>)
-declare <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double>)
-declare <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double>)
-
-define <2 x i1> @test_signed_v2f64_v2i1(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i1:
+declare <4 x   i1> @llvm.fptosi.sat.v4f32.v4i1  (<4 x float>)
+declare <4 x   i8> @llvm.fptosi.sat.v4f32.v4i8  (<4 x float>)
+declare <4 x  i13> @llvm.fptosi.sat.v4f32.v4i13 (<4 x float>)
+declare <4 x  i16> @llvm.fptosi.sat.v4f32.v4i16 (<4 x float>)
+declare <4 x  i19> @llvm.fptosi.sat.v4f32.v4i19 (<4 x float>)
+declare <4 x  i50> @llvm.fptosi.sat.v4f32.v4i50 (<4 x float>)
+declare <4 x  i64> @llvm.fptosi.sat.v4f32.v4i64 (<4 x float>)
+declare <4 x i100> @llvm.fptosi.sat.v4f32.v4i100(<4 x float>)
+declare <4 x i128> @llvm.fptosi.sat.v4f32.v4i128(<4 x float>)
+
+define <4 x i1> @test_signed_v4f32_v4i1(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i1:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fmov d2, #-1.00000000
-; CHECK-NEXT:    movi d3, #0000000000000000
-; CHECK-NEXT:    fmaxnm d4, d1, d2
-; CHECK-NEXT:    fmaxnm d2, d0, d2
-; CHECK-NEXT:    fcmp d1, d1
-; CHECK-NEXT:    fminnm d4, d4, d3
-; CHECK-NEXT:    fminnm d1, d2, d3
-; CHECK-NEXT:    fcvtzs w8, d4
-; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    mov s1, v0.s[1]
+; CHECK-NEXT:    fmov s2, #-1.00000000
+; CHECK-NEXT:    movi d4, #0000000000000000
+; CHECK-NEXT:    mov s6, v0.s[2]
+; CHECK-NEXT:    fmaxnm s5, s0, s2
+; CHECK-NEXT:    fmaxnm s3, s1, s2
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s5, s5, s4
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzs w9, s5
+; CHECK-NEXT:    fcvtzs w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmaxnm s2, s3, s2
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
 ; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s4
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i1> @llvm.fptosi.sat.v2f64.v2i1(<2 x double> %f)
-    ret <2 x i1> %x
+    %x = call <4 x i1> @llvm.fptosi.sat.v4f32.v4i1(<4 x float> %f)
+    ret <4 x i1> %x
 }
 
-define <2 x i8> @test_signed_v2f64_v2i8(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i8:
+define <4 x i8> @test_signed_v4f32_v4i8(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i8:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-4584664420663164928
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fmov d2, x8
-; CHECK-NEXT:    mov x8, #211106232532992
-; CHECK-NEXT:    movk x8, #16479, lsl #48
-; CHECK-NEXT:    fcmp d1, d1
-; CHECK-NEXT:    fmaxnm d3, d1, d2
-; CHECK-NEXT:    fmaxnm d2, d0, d2
-; CHECK-NEXT:    fmov d4, x8
-; CHECK-NEXT:    fminnm d3, d3, d4
-; CHECK-NEXT:    fminnm d1, d2, d4
-; CHECK-NEXT:    fcvtzs w8, d3
-; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    mov w8, #-1023410176
+; CHECK-NEXT:    mov s1, v0.s[1]
+; CHECK-NEXT:    mov s6, v0.s[2]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #1123942400
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s3, s1, s2
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s5, s0, s2
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s5, s5, s4
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzs w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzs w9, s5
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmaxnm s2, s3, s2
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
 ; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s4
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i8> @llvm.fptosi.sat.v2f64.v2i8(<2 x double> %f)
-    ret <2 x i8> %x
+    %x = call <4 x i8> @llvm.fptosi.sat.v4f32.v4i8(<4 x float> %f)
+    ret <4 x i8> %x
 }
 
-define <2 x i13> @test_signed_v2f64_v2i13(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i13:
+define <4 x i13> @test_signed_v4f32_v4i13(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i13:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-4562146422526312448
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fmov d2, x8
-; CHECK-NEXT:    mov x8, #279275953455104
-; CHECK-NEXT:    movk x8, #16559, lsl #48
-; CHECK-NEXT:    fcmp d1, d1
-; CHECK-NEXT:    fmaxnm d3, d1, d2
-; CHECK-NEXT:    fmaxnm d2, d0, d2
-; CHECK-NEXT:    fmov d4, x8
-; CHECK-NEXT:    fminnm d3, d3, d4
-; CHECK-NEXT:    fminnm d1, d2, d4
-; CHECK-NEXT:    fcvtzs w8, d3
-; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    mov w8, #-981467136
+; CHECK-NEXT:    mov s1, v0.s[1]
+; CHECK-NEXT:    mov s6, v0.s[2]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #61440
+; CHECK-NEXT:    movk w8, #17791, lsl #16
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s3, s1, s2
+; CHECK-NEXT:    fmaxnm s5, s0, s2
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s5, s5, s4
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzs w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzs w9, s5
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmaxnm s2, s3, s2
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
 ; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s4
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i13> @llvm.fptosi.sat.v2f64.v2i13(<2 x double> %f)
-    ret <2 x i13> %x
+    %x = call <4 x i13> @llvm.fptosi.sat.v4f32.v4i13(<4 x float> %f)
+    ret <4 x i13> %x
 }
 
-define <2 x i16> @test_signed_v2f64_v2i16(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i16:
+define <4 x i16> @test_signed_v4f32_v4i16(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i16:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-4548635623644200960
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fmov d2, x8
-; CHECK-NEXT:    mov x8, #281200098803712
-; CHECK-NEXT:    movk x8, #16607, lsl #48
-; CHECK-NEXT:    fcmp d1, d1
-; CHECK-NEXT:    fmaxnm d3, d1, d2
-; CHECK-NEXT:    fmaxnm d2, d0, d2
-; CHECK-NEXT:    fmov d4, x8
-; CHECK-NEXT:    fminnm d3, d3, d4
-; CHECK-NEXT:    fminnm d1, d2, d4
-; CHECK-NEXT:    fcvtzs w8, d3
-; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    mov w8, #-956301312
+; CHECK-NEXT:    mov s1, v0.s[1]
+; CHECK-NEXT:    mov s6, v0.s[2]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #65024
+; CHECK-NEXT:    movk w8, #18175, lsl #16
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s3, s1, s2
+; CHECK-NEXT:    fmaxnm s5, s0, s2
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s5, s5, s4
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzs w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzs w9, s5
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmaxnm s2, s3, s2
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
 ; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s4
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i16> @llvm.fptosi.sat.v2f64.v2i16(<2 x double> %f)
-    ret <2 x i16> %x
+    %x = call <4 x i16> @llvm.fptosi.sat.v4f32.v4i16(<4 x float> %f)
+    ret <4 x i16> %x
 }
 
-define <2 x i19> @test_signed_v2f64_v2i19(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i19:
+define <4 x i19> @test_signed_v4f32_v4i19(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i19:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-4535124824762089472
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fmov d2, x8
-; CHECK-NEXT:    mov x8, #281440616972288
-; CHECK-NEXT:    movk x8, #16655, lsl #48
-; CHECK-NEXT:    fcmp d1, d1
-; CHECK-NEXT:    fmaxnm d3, d1, d2
-; CHECK-NEXT:    fmaxnm d2, d0, d2
-; CHECK-NEXT:    fmov d4, x8
-; CHECK-NEXT:    fminnm d3, d3, d4
-; CHECK-NEXT:    fminnm d1, d2, d4
-; CHECK-NEXT:    fcvtzs w8, d3
-; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    mov w8, #-931135488
+; CHECK-NEXT:    mov s1, v0.s[1]
+; CHECK-NEXT:    mov s6, v0.s[2]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #65472
+; CHECK-NEXT:    movk w8, #18559, lsl #16
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s3, s1, s2
+; CHECK-NEXT:    fmaxnm s5, s0, s2
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s5, s5, s4
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzs w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzs w9, s5
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmaxnm s2, s3, s2
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
 ; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s4
 ; CHECK-NEXT:    mov v0.s[1], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    ret
-    %x = call <2 x i19> @llvm.fptosi.sat.v2f64.v2i19(<2 x double> %f)
-    ret <2 x i19> %x
-}
-
-define <2 x i32> @test_signed_v2f64_v2i32_duplicate(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i32_duplicate:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzs w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.s[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.s[3], w8
 ; CHECK-NEXT:    ret
-    %x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f)
-    ret <2 x i32> %x
+    %x = call <4 x i19> @llvm.fptosi.sat.v4f32.v4i19(<4 x float> %f)
+    ret <4 x i19> %x
 }
 
-define <2 x i50> @test_signed_v2f64_v2i50(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i50:
+define <4 x i32> @test_signed_v4f32_v4i32_duplicate(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i32_duplicate:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov x8, #-4395513236313604096
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fmov d2, x8
-; CHECK-NEXT:    mov x8, #-16
-; CHECK-NEXT:    movk x8, #17151, lsl #48
-; CHECK-NEXT:    fcmp d1, d1
-; CHECK-NEXT:    fmaxnm d3, d1, d2
-; CHECK-NEXT:    fmaxnm d2, d0, d2
-; CHECK-NEXT:    fmov d4, x8
-; CHECK-NEXT:    fminnm d3, d3, d4
-; CHECK-NEXT:    fminnm d1, d2, d4
-; CHECK-NEXT:    fcvtzs x8, d3
-; CHECK-NEXT:    fcvtzs x9, d1
-; CHECK-NEXT:    csel x8, xzr, x8, vs
-; CHECK-NEXT:    fcmp d0, d0
-; CHECK-NEXT:    csel x9, xzr, x9, vs
-; CHECK-NEXT:    fmov d0, x9
-; CHECK-NEXT:    mov v0.d[1], x8
+; CHECK-NEXT:    fcvtzs v0.4s, v0.4s
 ; CHECK-NEXT:    ret
-    %x = call <2 x i50> @llvm.fptosi.sat.v2f64.v2i50(<2 x double> %f)
-    ret <2 x i50> %x
+    %x = call <4 x i32> @llvm.fptosi.sat.v4f32.v4i32(<4 x float> %f)
+    ret <4 x i32> %x
 }
 
-define <2 x i64> @test_signed_v2f64_v2i64(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i64:
+define <4 x i50> @test_signed_v4f32_v4i50(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i50:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
-; CHECK-NEXT:    ret
-    %x = call <2 x i64> @llvm.fptosi.sat.v2f64.v2i64(<2 x double> %f)
+; CHECK-NEXT:    mov w8, #-671088640
+; CHECK-NEXT:    mov w9, #1476395007
+; CHECK-NEXT:    mov s3, v0.s[1]
+; CHECK-NEXT:    mov x10, #562949953421311
+; CHECK-NEXT:    fmov s1, w8
+; CHECK-NEXT:    fcvtzs x8, s0
+; CHECK-NEXT:    fmov s2, w9
+; CHECK-NEXT:    mov x9, #-562949953421312
+; CHECK-NEXT:    fcvtzs x11, s3
+; CHECK-NEXT:    fcmp s0, s1
+; CHECK-NEXT:    csel x8, x9, x8, lt
+; CHECK-NEXT:    fcmp s0, s2
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    csel x0, xzr, x8, vs
+; CHECK-NEXT:    fcmp s3, s1
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s3, s2
+; CHECK-NEXT:    fcvtzs x11, s0
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    mov s3, v0.s[1]
+; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    fcmp s0, s1
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s0, s2
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    csel x2, xzr, x8, vs
+; CHECK-NEXT:    fcvtzs x8, s3
+; CHECK-NEXT:    fcmp s3, s1
+; CHECK-NEXT:    csel x8, x9, x8, lt
+; CHECK-NEXT:    fcmp s3, s2
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    csel x3, xzr, x8, vs
+; CHECK-NEXT:    ret
+    %x = call <4 x i50> @llvm.fptosi.sat.v4f32.v4i50(<4 x float> %f)
+    ret <4 x i50> %x
+}
+
+define <4 x i64> @test_signed_v4f32_v4i64(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    mov s3, v0.s[1]
+; CHECK-NEXT:    fcvtzs x9, s0
+; CHECK-NEXT:    mov s2, v1.s[1]
+; CHECK-NEXT:    fcvtzs x8, s1
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    fcvtzs x9, s3
+; CHECK-NEXT:    fmov d1, x8
+; CHECK-NEXT:    fcvtzs x8, s2
+; CHECK-NEXT:    mov v0.d[1], x9
+; CHECK-NEXT:    mov v1.d[1], x8
+; CHECK-NEXT:    ret
+    %x = call <4 x i64> @llvm.fptosi.sat.v4f32.v4i64(<4 x float> %f)
+    ret <4 x i64> %x
+}
+
+define <4 x i100> @test_signed_v4f32_v4i100(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i100:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #128
+; CHECK-NEXT:    str d10, [sp, #32] // 8-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #40] // 16-byte Folded Spill
+; CHECK-NEXT:    str x30, [sp, #56] // 8-byte Folded Spill
+; CHECK-NEXT:    stp x26, x25, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #112] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 128
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w26, -64
+; CHECK-NEXT:    .cfi_offset w30, -72
+; CHECK-NEXT:    .cfi_offset b8, -80
+; CHECK-NEXT:    .cfi_offset b9, -88
+; CHECK-NEXT:    .cfi_offset b10, -96
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    str q0, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    mov w8, #-251658240
+; CHECK-NEXT:    mov x25, #-34359738368
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x26, #34359738367
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    mov w8, #1895825407
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fmov s10, w8
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    csel x19, xzr, x8, vs
+; CHECK-NEXT:    csel x20, xzr, x9, vs
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s0, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    csel x21, xzr, x8, vs
+; CHECK-NEXT:    csel x22, xzr, x9, vs
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    csel x23, xzr, x8, vs
+; CHECK-NEXT:    csel x24, xzr, x9, vs
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x19
+; CHECK-NEXT:    mov x3, x20
+; CHECK-NEXT:    mov x4, x21
+; CHECK-NEXT:    mov x5, x22
+; CHECK-NEXT:    mov x6, x23
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    mov x7, x24
+; CHECK-NEXT:    ldp x20, x19, [sp, #112] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, x25, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s0, s10
+; CHECK-NEXT:    ldr x30, [sp, #56] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x26, x8, gt
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    ldr d10, [sp, #32] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x9, xzr, x9, vs
+; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    ldp x26, x25, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    ldp d9, d8, [sp, #40] // 16-byte Folded Reload
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #128
+; CHECK-NEXT:    ret
+    %x = call <4 x i100> @llvm.fptosi.sat.v4f32.v4i100(<4 x float> %f)
+    ret <4 x i100> %x
+}
+
+define <4 x i128> @test_signed_v4f32_v4i128(<4 x float> %f) {
+; CHECK-LABEL: test_signed_v4f32_v4i128:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #128
+; CHECK-NEXT:    str d10, [sp, #32] // 8-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #40] // 16-byte Folded Spill
+; CHECK-NEXT:    str x30, [sp, #56] // 8-byte Folded Spill
+; CHECK-NEXT:    stp x26, x25, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #112] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 128
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w26, -64
+; CHECK-NEXT:    .cfi_offset w30, -72
+; CHECK-NEXT:    .cfi_offset b8, -80
+; CHECK-NEXT:    .cfi_offset b9, -88
+; CHECK-NEXT:    .cfi_offset b10, -96
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    str q0, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    mov w8, #-16777216
+; CHECK-NEXT:    mov x25, #-9223372036854775808
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x26, #9223372036854775807
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    mov w8, #2130706431
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fmov s10, w8
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    csel x19, xzr, x8, vs
+; CHECK-NEXT:    csel x20, xzr, x9, vs
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s0, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    csel x21, xzr, x8, vs
+; CHECK-NEXT:    csel x22, xzr, x9, vs
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    csel x23, xzr, x8, vs
+; CHECK-NEXT:    csel x24, xzr, x9, vs
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x19
+; CHECK-NEXT:    mov x3, x20
+; CHECK-NEXT:    mov x4, x21
+; CHECK-NEXT:    mov x5, x22
+; CHECK-NEXT:    mov x6, x23
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    mov x7, x24
+; CHECK-NEXT:    ldp x20, x19, [sp, #112] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, x25, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s0, s10
+; CHECK-NEXT:    ldr x30, [sp, #56] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x26, x8, gt
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    ldr d10, [sp, #32] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x9, xzr, x9, vs
+; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    ldp x26, x25, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    ldp d9, d8, [sp, #40] // 16-byte Folded Reload
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #128
+; CHECK-NEXT:    ret
+    %x = call <4 x i128> @llvm.fptosi.sat.v4f32.v4i128(<4 x float> %f)
+    ret <4 x i128> %x
+}
+
+;
+; 2-Vector double to signed integer -- result size variation
+;
+
+declare <2 x   i1> @llvm.fptosi.sat.v2f64.v2i1  (<2 x double>)
+declare <2 x   i8> @llvm.fptosi.sat.v2f64.v2i8  (<2 x double>)
+declare <2 x  i13> @llvm.fptosi.sat.v2f64.v2i13 (<2 x double>)
+declare <2 x  i16> @llvm.fptosi.sat.v2f64.v2i16 (<2 x double>)
+declare <2 x  i19> @llvm.fptosi.sat.v2f64.v2i19 (<2 x double>)
+declare <2 x  i50> @llvm.fptosi.sat.v2f64.v2i50 (<2 x double>)
+declare <2 x  i64> @llvm.fptosi.sat.v2f64.v2i64 (<2 x double>)
+declare <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double>)
+declare <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double>)
+
+define <2 x i1> @test_signed_v2f64_v2i1(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fmov d2, #-1.00000000
+; CHECK-NEXT:    movi d3, #0000000000000000
+; CHECK-NEXT:    fmaxnm d4, d1, d2
+; CHECK-NEXT:    fmaxnm d2, d0, d2
+; CHECK-NEXT:    fcmp d1, d1
+; CHECK-NEXT:    fminnm d4, d4, d3
+; CHECK-NEXT:    fminnm d1, d2, d3
+; CHECK-NEXT:    fcvtzs w8, d4
+; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i1> @llvm.fptosi.sat.v2f64.v2i1(<2 x double> %f)
+    ret <2 x i1> %x
+}
+
+define <2 x i8> @test_signed_v2f64_v2i8(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov x8, #-4584664420663164928
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fmov d2, x8
+; CHECK-NEXT:    mov x8, #211106232532992
+; CHECK-NEXT:    movk x8, #16479, lsl #48
+; CHECK-NEXT:    fcmp d1, d1
+; CHECK-NEXT:    fmaxnm d3, d1, d2
+; CHECK-NEXT:    fmaxnm d2, d0, d2
+; CHECK-NEXT:    fmov d4, x8
+; CHECK-NEXT:    fminnm d3, d3, d4
+; CHECK-NEXT:    fminnm d1, d2, d4
+; CHECK-NEXT:    fcvtzs w8, d3
+; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i8> @llvm.fptosi.sat.v2f64.v2i8(<2 x double> %f)
+    ret <2 x i8> %x
+}
+
+define <2 x i13> @test_signed_v2f64_v2i13(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i13:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov x8, #-4562146422526312448
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fmov d2, x8
+; CHECK-NEXT:    mov x8, #279275953455104
+; CHECK-NEXT:    movk x8, #16559, lsl #48
+; CHECK-NEXT:    fcmp d1, d1
+; CHECK-NEXT:    fmaxnm d3, d1, d2
+; CHECK-NEXT:    fmaxnm d2, d0, d2
+; CHECK-NEXT:    fmov d4, x8
+; CHECK-NEXT:    fminnm d3, d3, d4
+; CHECK-NEXT:    fminnm d1, d2, d4
+; CHECK-NEXT:    fcvtzs w8, d3
+; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i13> @llvm.fptosi.sat.v2f64.v2i13(<2 x double> %f)
+    ret <2 x i13> %x
+}
+
+define <2 x i16> @test_signed_v2f64_v2i16(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov x8, #-4548635623644200960
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fmov d2, x8
+; CHECK-NEXT:    mov x8, #281200098803712
+; CHECK-NEXT:    movk x8, #16607, lsl #48
+; CHECK-NEXT:    fcmp d1, d1
+; CHECK-NEXT:    fmaxnm d3, d1, d2
+; CHECK-NEXT:    fmaxnm d2, d0, d2
+; CHECK-NEXT:    fmov d4, x8
+; CHECK-NEXT:    fminnm d3, d3, d4
+; CHECK-NEXT:    fminnm d1, d2, d4
+; CHECK-NEXT:    fcvtzs w8, d3
+; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i16> @llvm.fptosi.sat.v2f64.v2i16(<2 x double> %f)
+    ret <2 x i16> %x
+}
+
+define <2 x i19> @test_signed_v2f64_v2i19(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i19:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov x8, #-4535124824762089472
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fmov d2, x8
+; CHECK-NEXT:    mov x8, #281440616972288
+; CHECK-NEXT:    movk x8, #16655, lsl #48
+; CHECK-NEXT:    fcmp d1, d1
+; CHECK-NEXT:    fmaxnm d3, d1, d2
+; CHECK-NEXT:    fmaxnm d2, d0, d2
+; CHECK-NEXT:    fmov d4, x8
+; CHECK-NEXT:    fminnm d3, d3, d4
+; CHECK-NEXT:    fminnm d1, d2, d4
+; CHECK-NEXT:    fcvtzs w8, d3
+; CHECK-NEXT:    fcvtzs w9, d1
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i19> @llvm.fptosi.sat.v2f64.v2i19(<2 x double> %f)
+    ret <2 x i19> %x
+}
+
+define <2 x i32> @test_signed_v2f64_v2i32_duplicate(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i32_duplicate:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fcvtzs w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzs w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f)
+    ret <2 x i32> %x
+}
+
+define <2 x i50> @test_signed_v2f64_v2i50(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i50:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov x8, #-4395513236313604096
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fmov d2, x8
+; CHECK-NEXT:    mov x8, #-16
+; CHECK-NEXT:    movk x8, #17151, lsl #48
+; CHECK-NEXT:    fcmp d1, d1
+; CHECK-NEXT:    fmaxnm d3, d1, d2
+; CHECK-NEXT:    fmaxnm d2, d0, d2
+; CHECK-NEXT:    fmov d4, x8
+; CHECK-NEXT:    fminnm d3, d3, d4
+; CHECK-NEXT:    fminnm d1, d2, d4
+; CHECK-NEXT:    fcvtzs x8, d3
+; CHECK-NEXT:    fcvtzs x9, d1
+; CHECK-NEXT:    csel x8, xzr, x8, vs
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    csel x9, xzr, x9, vs
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    mov v0.d[1], x8
+; CHECK-NEXT:    ret
+    %x = call <2 x i50> @llvm.fptosi.sat.v2f64.v2i50(<2 x double> %f)
+    ret <2 x i50> %x
+}
+
+define <2 x i64> @test_signed_v2f64_v2i64(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvtzs v0.2d, v0.2d
+; CHECK-NEXT:    ret
+    %x = call <2 x i64> @llvm.fptosi.sat.v2f64.v2i64(<2 x double> %f)
     ret <2 x i64> %x
 }
 
-define <2 x i100> @test_signed_v2f64_v2i100(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i100:
+define <2 x i100> @test_signed_v2f64_v2i100(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i100:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #80
+; CHECK-NEXT:    str d10, [sp, #16] // 8-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #24] // 16-byte Folded Spill
+; CHECK-NEXT:    str x30, [sp, #40] // 8-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w30, -40
+; CHECK-NEXT:    .cfi_offset b8, -48
+; CHECK-NEXT:    .cfi_offset b9, -56
+; CHECK-NEXT:    .cfi_offset b10, -64
+; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov d0, d8
+; CHECK-NEXT:    bl __fixdfti
+; CHECK-NEXT:    mov x8, #-4170333254945079296
+; CHECK-NEXT:    mov x21, #-34359738368
+; CHECK-NEXT:    mov x22, #34359738367
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fmov d9, x8
+; CHECK-NEXT:    mov x8, #5053038781909696511
+; CHECK-NEXT:    fcmp d8, d9
+; CHECK-NEXT:    fmov d10, x8
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp d8, d10
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp d8, d8
+; CHECK-NEXT:    csel x19, xzr, x8, vs
+; CHECK-NEXT:    csel x20, xzr, x9, vs
+; CHECK-NEXT:    bl __fixdfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x19
+; CHECK-NEXT:    mov x3, x20
+; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x20, x19, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp d0, d9
+; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, x21, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp d0, d10
+; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x22, x8, gt
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    ldp x22, x21, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x9, xzr, x9, vs
+; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #80
+; CHECK-NEXT:    ret
+    %x = call <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double> %f)
+    ret <2 x i100> %x
+}
+
+define <2 x i128> @test_signed_v2f64_v2i128(<2 x double> %f) {
+; CHECK-LABEL: test_signed_v2f64_v2i128:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #80
+; CHECK-NEXT:    str d10, [sp, #16] // 8-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #24] // 16-byte Folded Spill
+; CHECK-NEXT:    str x30, [sp, #40] // 8-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w30, -40
+; CHECK-NEXT:    .cfi_offset b8, -48
+; CHECK-NEXT:    .cfi_offset b9, -56
+; CHECK-NEXT:    .cfi_offset b10, -64
+; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov d0, d8
+; CHECK-NEXT:    bl __fixdfti
+; CHECK-NEXT:    mov x8, #-4044232465378705408
+; CHECK-NEXT:    mov x21, #-9223372036854775808
+; CHECK-NEXT:    mov x22, #9223372036854775807
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fmov d9, x8
+; CHECK-NEXT:    mov x8, #5179139571476070399
+; CHECK-NEXT:    fcmp d8, d9
+; CHECK-NEXT:    fmov d10, x8
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp d8, d10
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp d8, d8
+; CHECK-NEXT:    csel x19, xzr, x8, vs
+; CHECK-NEXT:    csel x20, xzr, x9, vs
+; CHECK-NEXT:    bl __fixdfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x19
+; CHECK-NEXT:    mov x3, x20
+; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x20, x19, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp d0, d9
+; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, x21, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp d0, d10
+; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x22, x8, gt
+; CHECK-NEXT:    fcmp d0, d0
+; CHECK-NEXT:    ldp x22, x21, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x9, xzr, x9, vs
+; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #80
+; CHECK-NEXT:    ret
+    %x = call <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double> %f)
+    ret <2 x i128> %x
+}
+
+;
+; 4-Vector half to signed integer -- result size variation
+;
+
+declare <4 x   i1> @llvm.fptosi.sat.v4f16.v4i1  (<4 x half>)
+declare <4 x   i8> @llvm.fptosi.sat.v4f16.v4i8  (<4 x half>)
+declare <4 x  i13> @llvm.fptosi.sat.v4f16.v4i13 (<4 x half>)
+declare <4 x  i16> @llvm.fptosi.sat.v4f16.v4i16 (<4 x half>)
+declare <4 x  i19> @llvm.fptosi.sat.v4f16.v4i19 (<4 x half>)
+declare <4 x  i50> @llvm.fptosi.sat.v4f16.v4i50 (<4 x half>)
+declare <4 x  i64> @llvm.fptosi.sat.v4f16.v4i64 (<4 x half>)
+declare <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half>)
+declare <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half>)
+
+define <4 x i1> @test_signed_v4f16_v4i1(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
+; CHECK-NEXT:    fmov s2, #-1.00000000
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    movi d5, #0000000000000000
+; CHECK-NEXT:    mov h6, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fmaxnm s7, s3, s2
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fmaxnm s4, s1, s2
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fminnm s7, s7, s5
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s4, s4, s5
+; CHECK-NEXT:    fcvtzs w9, s7
+; CHECK-NEXT:    fminnm s1, s1, s5
+; CHECK-NEXT:    fcvtzs w8, s4
+; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fmaxnm s2, s4, s2
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s5
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <4 x i1> @llvm.fptosi.sat.v4f16.v4i1(<4 x half> %f)
+    ret <4 x i1> %x
+}
+
+define <4 x i8> @test_signed_v4f16_v4i8(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
+; CHECK-NEXT:    mov w8, #-1023410176
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    mov h6, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #1123942400
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fmov s5, w8
+; CHECK-NEXT:    fmaxnm s7, s3, s2
+; CHECK-NEXT:    fmaxnm s4, s1, s2
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s7, s7, s5
+; CHECK-NEXT:    fminnm s4, s4, s5
+; CHECK-NEXT:    fminnm s1, s1, s5
+; CHECK-NEXT:    fcvtzs w9, s7
+; CHECK-NEXT:    fcvtzs w8, s4
+; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fmaxnm s2, s4, s2
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s5
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <4 x i8> @llvm.fptosi.sat.v4f16.v4i8(<4 x half> %f)
+    ret <4 x i8> %x
+}
+
+define <4 x i13> @test_signed_v4f16_v4i13(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i13:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
+; CHECK-NEXT:    mov w8, #-981467136
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    mov h6, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #61440
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    movk w8, #17791, lsl #16
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fmaxnm s7, s3, s2
+; CHECK-NEXT:    fmov s5, w8
+; CHECK-NEXT:    fmaxnm s4, s1, s2
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s7, s7, s5
+; CHECK-NEXT:    fminnm s4, s4, s5
+; CHECK-NEXT:    fminnm s1, s1, s5
+; CHECK-NEXT:    fcvtzs w9, s7
+; CHECK-NEXT:    fcvtzs w8, s4
+; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fmaxnm s2, s4, s2
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s5
+; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.h[3], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <4 x i13> @llvm.fptosi.sat.v4f16.v4i13(<4 x half> %f)
+    ret <4 x i13> %x
+}
+
+define <4 x i16> @test_signed_v4f16_v4i16(<4 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v4f16_v4i16:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    mov w8, #-956301312
+; CHECK-CVT-NEXT:    fmov s2, w8
+; CHECK-CVT-NEXT:    mov w8, #65024
+; CHECK-CVT-NEXT:    mov s1, v0.s[1]
+; CHECK-CVT-NEXT:    movk w8, #18175, lsl #16
+; CHECK-CVT-NEXT:    mov s6, v0.s[2]
+; CHECK-CVT-NEXT:    fmaxnm s5, s0, s2
+; CHECK-CVT-NEXT:    fmov s4, w8
+; CHECK-CVT-NEXT:    fmaxnm s3, s1, s2
+; CHECK-CVT-NEXT:    fcmp s1, s1
+; CHECK-CVT-NEXT:    fmaxnm s1, s6, s2
+; CHECK-CVT-NEXT:    fminnm s5, s5, s4
+; CHECK-CVT-NEXT:    fminnm s3, s3, s4
+; CHECK-CVT-NEXT:    fminnm s1, s1, s4
+; CHECK-CVT-NEXT:    fcvtzs w9, s5
+; CHECK-CVT-NEXT:    fcvtzs w8, s3
+; CHECK-CVT-NEXT:    mov s3, v0.s[3]
+; CHECK-CVT-NEXT:    csel w8, wzr, w8, vs
+; CHECK-CVT-NEXT:    fcmp s0, s0
+; CHECK-CVT-NEXT:    fmaxnm s2, s3, s2
+; CHECK-CVT-NEXT:    csel w9, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s6, s6
+; CHECK-CVT-NEXT:    fmov s0, w9
+; CHECK-CVT-NEXT:    fcvtzs w9, s1
+; CHECK-CVT-NEXT:    fminnm s1, s2, s4
+; CHECK-CVT-NEXT:    mov v0.h[1], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s3, s3
+; CHECK-CVT-NEXT:    fcvtzs w9, s1
+; CHECK-CVT-NEXT:    mov v0.h[2], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    mov v0.h[3], w8
+; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_signed_v4f16_v4i16:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    fcvtzs v0.4h, v0.4h
+; CHECK-FP16-NEXT:    ret
+    %x = call <4 x i16> @llvm.fptosi.sat.v4f16.v4i16(<4 x half> %f)
+    ret <4 x i16> %x
+}
+
+define <4 x i19> @test_signed_v4f16_v4i19(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i19:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #80
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
+; CHECK-NEXT:    mov w8, #-931135488
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    mov h6, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    mov w8, #65472
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    movk w8, #18559, lsl #16
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fmaxnm s7, s3, s2
+; CHECK-NEXT:    fmov s5, w8
+; CHECK-NEXT:    fmaxnm s4, s1, s2
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s1, s6, s2
+; CHECK-NEXT:    fminnm s7, s7, s5
+; CHECK-NEXT:    fminnm s4, s4, s5
+; CHECK-NEXT:    fminnm s1, s1, s5
+; CHECK-NEXT:    fcvtzs w9, s7
+; CHECK-NEXT:    fcvtzs w8, s4
+; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fmaxnm s2, s4, s2
+; CHECK-NEXT:    csel w9, wzr, w9, vs
+; CHECK-NEXT:    fcmp s6, s6
+; CHECK-NEXT:    fmov s0, w9
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    fminnm s1, s2, s5
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fcvtzs w9, s1
+; CHECK-NEXT:    mov v0.s[2], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v0.s[3], w8
+; CHECK-NEXT:    ret
+    %x = call <4 x i19> @llvm.fptosi.sat.v4f16.v4i19(<4 x half> %f)
+    ret <4 x i19> %x
+}
+
+define <4 x i32> @test_signed_v4f16_v4i32_duplicate(<4 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v4f16_v4i32_duplicate:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    fcvtzs v0.4s, v0.4s
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_signed_v4f16_v4i32_duplicate:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-FP16-NEXT:    mov h2, v0.h[1]
+; CHECK-FP16-NEXT:    fcvtzs w8, h0
+; CHECK-FP16-NEXT:    fmov s1, w8
+; CHECK-FP16-NEXT:    fcvtzs w8, h2
+; CHECK-FP16-NEXT:    mov h2, v0.h[2]
+; CHECK-FP16-NEXT:    mov h0, v0.h[3]
+; CHECK-FP16-NEXT:    mov v1.s[1], w8
+; CHECK-FP16-NEXT:    fcvtzs w8, h2
+; CHECK-FP16-NEXT:    mov v1.s[2], w8
+; CHECK-FP16-NEXT:    fcvtzs w8, h0
+; CHECK-FP16-NEXT:    mov v1.s[3], w8
+; CHECK-FP16-NEXT:    mov v0.16b, v1.16b
+; CHECK-FP16-NEXT:    ret
+    %x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f)
+    ret <4 x i32> %x
+}
+
+define <4 x i50> @test_signed_v4f16_v4i50(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i50:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov w8, #-671088640
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    fcvt s1, h0
+; CHECK-NEXT:    mov w9, #1476395007
+; CHECK-NEXT:    mov h4, v0.h[1]
+; CHECK-NEXT:    mov x10, #562949953421311
+; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    fmov s3, w9
+; CHECK-NEXT:    fcvtzs x8, s1
+; CHECK-NEXT:    mov x9, #-562949953421312
+; CHECK-NEXT:    fcvt s4, h4
+; CHECK-NEXT:    fcmp s1, s2
+; CHECK-NEXT:    csel x8, x9, x8, lt
+; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    fcvtzs x11, s4
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    mov h1, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x0, xzr, x8, vs
+; CHECK-NEXT:    fcmp s4, s2
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s4, s3
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fcvtzs x11, s1
+; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    fcmp s1, s2
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    csel x2, xzr, x8, vs
+; CHECK-NEXT:    fcvtzs x8, s0
+; CHECK-NEXT:    fcmp s0, s2
+; CHECK-NEXT:    csel x8, x9, x8, lt
+; CHECK-NEXT:    fcmp s0, s3
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    csel x3, xzr, x8, vs
+; CHECK-NEXT:    ret
+    %x = call <4 x i50> @llvm.fptosi.sat.v4f16.v4i50(<4 x half> %f)
+    ret <4 x i50> %x
+}
+
+define <4 x i64> @test_signed_v4f16_v4i64(<4 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v4f16_v4i64:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-CVT-NEXT:    mov h1, v0.h[2]
+; CHECK-CVT-NEXT:    mov h2, v0.h[1]
+; CHECK-CVT-NEXT:    fcvt s3, h0
+; CHECK-CVT-NEXT:    mov h0, v0.h[3]
+; CHECK-CVT-NEXT:    fcvt s1, h1
+; CHECK-CVT-NEXT:    fcvt s2, h2
+; CHECK-CVT-NEXT:    fcvtzs x8, s3
+; CHECK-CVT-NEXT:    fcvt s3, h0
+; CHECK-CVT-NEXT:    fcvtzs x9, s1
+; CHECK-CVT-NEXT:    fmov d0, x8
+; CHECK-CVT-NEXT:    fcvtzs x8, s2
+; CHECK-CVT-NEXT:    fmov d1, x9
+; CHECK-CVT-NEXT:    fcvtzs x9, s3
+; CHECK-CVT-NEXT:    mov v0.d[1], x8
+; CHECK-CVT-NEXT:    mov v1.d[1], x9
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_signed_v4f16_v4i64:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-FP16-NEXT:    mov h1, v0.h[2]
+; CHECK-FP16-NEXT:    mov h2, v0.h[1]
+; CHECK-FP16-NEXT:    mov h3, v0.h[3]
+; CHECK-FP16-NEXT:    fcvtzs x8, h0
+; CHECK-FP16-NEXT:    fcvtzs x9, h1
+; CHECK-FP16-NEXT:    fmov d0, x8
+; CHECK-FP16-NEXT:    fcvtzs x8, h2
+; CHECK-FP16-NEXT:    fmov d1, x9
+; CHECK-FP16-NEXT:    fcvtzs x9, h3
+; CHECK-FP16-NEXT:    mov v0.d[1], x8
+; CHECK-FP16-NEXT:    mov v1.d[1], x9
+; CHECK-FP16-NEXT:    ret
+    %x = call <4 x i64> @llvm.fptosi.sat.v4f16.v4i64(<4 x half> %f)
+    ret <4 x i64> %x
+}
+
+define <4 x i100> @test_signed_v4f16_v4i100(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i100:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #112
 ; CHECK-NEXT:    str d10, [sp, #16] // 8-byte Folded Spill
 ; CHECK-NEXT:    stp d9, d8, [sp, #24] // 16-byte Folded Spill
 ; CHECK-NEXT:    str x30, [sp, #40] // 8-byte Folded Spill
-; CHECK-NEXT:    stp x22, x21, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    stp x26, x25, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 112
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
 ; CHECK-NEXT:    .cfi_offset w22, -32
-; CHECK-NEXT:    .cfi_offset w30, -40
-; CHECK-NEXT:    .cfi_offset b8, -48
-; CHECK-NEXT:    .cfi_offset b9, -56
-; CHECK-NEXT:    .cfi_offset b10, -64
-; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w26, -64
+; CHECK-NEXT:    .cfi_offset w30, -72
+; CHECK-NEXT:    .cfi_offset b8, -80
+; CHECK-NEXT:    .cfi_offset b9, -88
+; CHECK-NEXT:    .cfi_offset b10, -96
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
 ; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fmov d0, d8
-; CHECK-NEXT:    bl __fixdfti
-; CHECK-NEXT:    mov x8, #-4170333254945079296
-; CHECK-NEXT:    mov x21, #-34359738368
-; CHECK-NEXT:    mov x22, #34359738367
+; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    mov w8, #-251658240
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    fmov d9, x8
-; CHECK-NEXT:    mov x8, #5053038781909696511
-; CHECK-NEXT:    fcmp d8, d9
-; CHECK-NEXT:    fmov d10, x8
+; CHECK-NEXT:    mov x25, #-34359738368
+; CHECK-NEXT:    mov x26, #34359738367
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    mov w8, #1895825407
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, x21, x1, lt
-; CHECK-NEXT:    fcmp d8, d10
-; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
-; CHECK-NEXT:    fcmp d8, d8
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
 ; CHECK-NEXT:    csel x19, xzr, x8, vs
 ; CHECK-NEXT:    csel x20, xzr, x9, vs
-; CHECK-NEXT:    bl __fixdfti
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x21, xzr, x8, vs
+; CHECK-NEXT:    csel x22, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x23, xzr, x8, vs
+; CHECK-NEXT:    csel x24, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    mov x2, x19
 ; CHECK-NEXT:    mov x3, x20
-; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x20, x19, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT:    fcmp d0, d9
-; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
-; CHECK-NEXT:    csel x8, x21, x1, lt
+; CHECK-NEXT:    mov x4, x21
+; CHECK-NEXT:    mov x5, x22
+; CHECK-NEXT:    mov x6, x23
+; CHECK-NEXT:    csel x8, x25, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
-; CHECK-NEXT:    fcmp d0, d10
-; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov x7, x24
+; CHECK-NEXT:    ldp x20, x19, [sp, #96] // 16-byte Folded Reload
 ; CHECK-NEXT:    csinv x9, x9, xzr, le
-; CHECK-NEXT:    csel x8, x22, x8, gt
-; CHECK-NEXT:    fcmp d0, d0
-; CHECK-NEXT:    ldp x22, x21, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, x26, x8, gt
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #80] // 16-byte Folded Reload
 ; CHECK-NEXT:    csel x9, xzr, x9, vs
 ; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    ldp x24, x23, [sp, #64] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x26, x25, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #80
+; CHECK-NEXT:    add sp, sp, #112
 ; CHECK-NEXT:    ret
-    %x = call <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double> %f)
-    ret <2 x i100> %x
+    %x = call <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half> %f)
+    ret <4 x i100> %x
 }
 
-define <2 x i128> @test_signed_v2f64_v2i128(<2 x double> %f) {
-; CHECK-LABEL: test_signed_v2f64_v2i128:
+define <4 x i128> @test_signed_v4f16_v4i128(<4 x half> %f) {
+; CHECK-LABEL: test_signed_v4f16_v4i128:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #80
+; CHECK-NEXT:    sub sp, sp, #112
 ; CHECK-NEXT:    str d10, [sp, #16] // 8-byte Folded Spill
 ; CHECK-NEXT:    stp d9, d8, [sp, #24] // 16-byte Folded Spill
 ; CHECK-NEXT:    str x30, [sp, #40] // 8-byte Folded Spill
-; CHECK-NEXT:    stp x22, x21, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 80
+; CHECK-NEXT:    stp x26, x25, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 112
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
 ; CHECK-NEXT:    .cfi_offset w22, -32
-; CHECK-NEXT:    .cfi_offset w30, -40
-; CHECK-NEXT:    .cfi_offset b8, -48
-; CHECK-NEXT:    .cfi_offset b9, -56
-; CHECK-NEXT:    .cfi_offset b10, -64
-; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w26, -64
+; CHECK-NEXT:    .cfi_offset w30, -72
+; CHECK-NEXT:    .cfi_offset b8, -80
+; CHECK-NEXT:    .cfi_offset b9, -88
+; CHECK-NEXT:    .cfi_offset b10, -96
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
 ; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fmov d0, d8
-; CHECK-NEXT:    bl __fixdfti
-; CHECK-NEXT:    mov x8, #-4044232465378705408
-; CHECK-NEXT:    mov x21, #-9223372036854775808
-; CHECK-NEXT:    mov x22, #9223372036854775807
+; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    mov w8, #-16777216
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    fmov d9, x8
-; CHECK-NEXT:    mov x8, #5179139571476070399
-; CHECK-NEXT:    fcmp d8, d9
-; CHECK-NEXT:    fmov d10, x8
+; CHECK-NEXT:    mov x25, #-9223372036854775808
+; CHECK-NEXT:    mov x26, #9223372036854775807
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    mov w8, #2130706431
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, x21, x1, lt
-; CHECK-NEXT:    fcmp d8, d10
-; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
-; CHECK-NEXT:    fcmp d8, d8
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
 ; CHECK-NEXT:    csel x19, xzr, x8, vs
 ; CHECK-NEXT:    csel x20, xzr, x9, vs
-; CHECK-NEXT:    bl __fixdfti
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x21, xzr, x8, vs
+; CHECK-NEXT:    csel x22, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x23, xzr, x8, vs
+; CHECK-NEXT:    csel x24, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    mov x2, x19
 ; CHECK-NEXT:    mov x3, x20
-; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x20, x19, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT:    fcmp d0, d9
-; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
-; CHECK-NEXT:    csel x8, x21, x1, lt
+; CHECK-NEXT:    mov x4, x21
+; CHECK-NEXT:    mov x5, x22
+; CHECK-NEXT:    mov x6, x23
+; CHECK-NEXT:    csel x8, x25, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
-; CHECK-NEXT:    fcmp d0, d10
-; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov x7, x24
+; CHECK-NEXT:    ldp x20, x19, [sp, #96] // 16-byte Folded Reload
 ; CHECK-NEXT:    csinv x9, x9, xzr, le
-; CHECK-NEXT:    csel x8, x22, x8, gt
-; CHECK-NEXT:    fcmp d0, d0
-; CHECK-NEXT:    ldp x22, x21, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, x26, x8, gt
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #80] // 16-byte Folded Reload
 ; CHECK-NEXT:    csel x9, xzr, x9, vs
 ; CHECK-NEXT:    csel x1, xzr, x8, vs
+; CHECK-NEXT:    ldp x24, x23, [sp, #64] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x26, x25, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #80
+; CHECK-NEXT:    add sp, sp, #112
 ; CHECK-NEXT:    ret
-    %x = call <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double> %f)
-    ret <2 x i128> %x
+    %x = call <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half> %f)
+    ret <4 x i128> %x
 }
 
 ;
-; 4-Vector half to signed integer -- result size variation
+; 8-Vector half to signed integer -- result size variation
 ;
 
-declare <4 x   i1> @llvm.fptosi.sat.v4f16.v4i1  (<4 x half>)
-declare <4 x   i8> @llvm.fptosi.sat.v4f16.v4i8  (<4 x half>)
-declare <4 x  i13> @llvm.fptosi.sat.v4f16.v4i13 (<4 x half>)
-declare <4 x  i16> @llvm.fptosi.sat.v4f16.v4i16 (<4 x half>)
-declare <4 x  i19> @llvm.fptosi.sat.v4f16.v4i19 (<4 x half>)
-declare <4 x  i50> @llvm.fptosi.sat.v4f16.v4i50 (<4 x half>)
-declare <4 x  i64> @llvm.fptosi.sat.v4f16.v4i64 (<4 x half>)
-declare <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half>)
-declare <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half>)
-
-define <4 x i1> @test_signed_v4f16_v4i1(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i1:
+declare <8 x   i1> @llvm.fptosi.sat.v8f16.v8i1  (<8 x half>)
+declare <8 x   i8> @llvm.fptosi.sat.v8f16.v8i8  (<8 x half>)
+declare <8 x  i13> @llvm.fptosi.sat.v8f16.v8i13 (<8 x half>)
+declare <8 x  i16> @llvm.fptosi.sat.v8f16.v8i16 (<8 x half>)
+declare <8 x  i19> @llvm.fptosi.sat.v8f16.v8i19 (<8 x half>)
+declare <8 x  i50> @llvm.fptosi.sat.v8f16.v8i50 (<8 x half>)
+declare <8 x  i64> @llvm.fptosi.sat.v8f16.v8i64 (<8 x half>)
+declare <8 x i100> @llvm.fptosi.sat.v8f16.v8i100(<8 x half>)
+declare <8 x i128> @llvm.fptosi.sat.v8f16.v8i128(<8 x half>)
+
+define <8 x i1> @test_signed_v8f16_v8i1(<8 x half> %f) {
+; CHECK-LABEL: test_signed_v8f16_v8i1:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
 ; CHECK-NEXT:    mov h1, v0.h[1]
 ; CHECK-NEXT:    fmov s2, #-1.00000000
-; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    movi d5, #0000000000000000
+; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    movi d3, #0000000000000000
 ; CHECK-NEXT:    mov h6, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    mov h7, v0.h[3]
+; CHECK-NEXT:    mov h17, v0.h[4]
+; CHECK-NEXT:    mov h18, v0.h[6]
 ; CHECK-NEXT:    fcvt s1, h1
-; CHECK-NEXT:    fmaxnm s7, s3, s2
+; CHECK-NEXT:    fmaxnm s16, s4, s2
 ; CHECK-NEXT:    fcvt s6, h6
-; CHECK-NEXT:    fmaxnm s4, s1, s2
+; CHECK-NEXT:    fcvt s7, h7
+; CHECK-NEXT:    fmaxnm s5, s1, s2
 ; CHECK-NEXT:    fcmp s1, s1
-; CHECK-NEXT:    fminnm s7, s7, s5
-; CHECK-NEXT:    fmaxnm s1, s6, s2
-; CHECK-NEXT:    fminnm s4, s4, s5
-; CHECK-NEXT:    fcvtzs w9, s7
-; CHECK-NEXT:    fminnm s1, s1, s5
-; CHECK-NEXT:    fcvtzs w8, s4
-; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    fminnm s16, s16, s3
+; CHECK-NEXT:    mov h1, v0.h[5]
+; CHECK-NEXT:    mov h0, v0.h[7]
+; CHECK-NEXT:    fminnm s5, s5, s3
+; CHECK-NEXT:    fcvtzs w9, s16
+; CHECK-NEXT:    fmaxnm s16, s7, s2
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    fcvtzs w8, s5
+; CHECK-NEXT:    fmaxnm s5, s6, s2
+; CHECK-NEXT:    fminnm s16, s16, s3
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp s3, s3
-; CHECK-NEXT:    fmaxnm s2, s4, s2
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fminnm s4, s5, s3
+; CHECK-NEXT:    fcvt s5, h17
+; CHECK-NEXT:    fcvt s17, h1
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
 ; CHECK-NEXT:    fcmp s6, s6
-; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    fminnm s1, s2, s5
-; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    fcvtzs w10, s4
+; CHECK-NEXT:    fmaxnm s4, s5, s2
+; CHECK-NEXT:    fmov s1, w9
+; CHECK-NEXT:    fcvtzs w9, s16
+; CHECK-NEXT:    fmaxnm s6, s17, s2
+; CHECK-NEXT:    mov v1.b[1], w8
+; CHECK-NEXT:    csel w8, wzr, w10, vs
+; CHECK-NEXT:    fcmp s7, s7
+; CHECK-NEXT:    fcvt s7, h18
+; CHECK-NEXT:    fminnm s4, s4, s3
+; CHECK-NEXT:    fminnm s6, s6, s3
+; CHECK-NEXT:    mov v1.b[2], w8
 ; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    fcmp s4, s4
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcmp s5, s5
+; CHECK-NEXT:    fcvtzs w9, s4
+; CHECK-NEXT:    fmaxnm s4, s7, s2
+; CHECK-NEXT:    fcvtzs w10, s6
+; CHECK-NEXT:    fmaxnm s2, s0, s2
+; CHECK-NEXT:    mov v1.b[3], w8
 ; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    mov v0.h[3], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    ret
-    %x = call <4 x i1> @llvm.fptosi.sat.v4f16.v4i1(<4 x half> %f)
-    ret <4 x i1> %x
-}
-
-define <4 x i8> @test_signed_v4f16_v4i8(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i8:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    mov h1, v0.h[1]
-; CHECK-NEXT:    mov w8, #-1023410176
-; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    mov h6, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    fmov s2, w8
-; CHECK-NEXT:    mov w8, #1123942400
-; CHECK-NEXT:    fcvt s1, h1
-; CHECK-NEXT:    fcvt s6, h6
-; CHECK-NEXT:    fmov s5, w8
-; CHECK-NEXT:    fmaxnm s7, s3, s2
-; CHECK-NEXT:    fmaxnm s4, s1, s2
-; CHECK-NEXT:    fcmp s1, s1
-; CHECK-NEXT:    fmaxnm s1, s6, s2
-; CHECK-NEXT:    fminnm s7, s7, s5
-; CHECK-NEXT:    fminnm s4, s4, s5
-; CHECK-NEXT:    fminnm s1, s1, s5
-; CHECK-NEXT:    fcvtzs w9, s7
-; CHECK-NEXT:    fcvtzs w8, s4
-; CHECK-NEXT:    fcvt s4, h0
-; CHECK-NEXT:    csel w8, wzr, w8, vs
-; CHECK-NEXT:    fcmp s3, s3
-; CHECK-NEXT:    fmaxnm s2, s4, s2
-; CHECK-NEXT:    csel w9, wzr, w9, vs
-; CHECK-NEXT:    fcmp s6, s6
-; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    fminnm s1, s2, s5
-; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    fcmp s17, s17
+; CHECK-NEXT:    fminnm s4, s4, s3
+; CHECK-NEXT:    fminnm s2, s2, s3
+; CHECK-NEXT:    mov v1.b[4], w8
+; CHECK-NEXT:    csel w8, wzr, w10, vs
+; CHECK-NEXT:    fcmp s7, s7
+; CHECK-NEXT:    fcvtzs w9, s4
+; CHECK-NEXT:    mov v1.b[5], w8
 ; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    fcmp s4, s4
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzs w9, s2
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    mov v1.b[6], w8
 ; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    mov v0.h[3], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    mov v1.b[7], w8
+; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
-    %x = call <4 x i8> @llvm.fptosi.sat.v4f16.v4i8(<4 x half> %f)
-    ret <4 x i8> %x
+    %x = call <8 x i1> @llvm.fptosi.sat.v8f16.v8i1(<8 x half> %f)
+    ret <8 x i1> %x
+}
+
+define <8 x i8> @test_signed_v8f16_v8i8(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v8f16_v8i8:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl v3.4s, v0.4h
+; CHECK-CVT-NEXT:    mov w8, #-1023410176
+; CHECK-CVT-NEXT:    fmov s1, w8
+; CHECK-CVT-NEXT:    mov w8, #1123942400
+; CHECK-CVT-NEXT:    mov s4, v3.s[1]
+; CHECK-CVT-NEXT:    mov s7, v3.s[2]
+; CHECK-CVT-NEXT:    mov s16, v3.s[3]
+; CHECK-CVT-NEXT:    fmov s2, w8
+; CHECK-CVT-NEXT:    fmaxnm s6, s3, s1
+; CHECK-CVT-NEXT:    fmaxnm s5, s4, s1
+; CHECK-CVT-NEXT:    fcmp s4, s4
+; CHECK-CVT-NEXT:    fcvtl2 v4.4s, v0.8h
+; CHECK-CVT-NEXT:    fmaxnm s0, s7, s1
+; CHECK-CVT-NEXT:    fminnm s6, s6, s2
+; CHECK-CVT-NEXT:    fminnm s5, s5, s2
+; CHECK-CVT-NEXT:    fminnm s0, s0, s2
+; CHECK-CVT-NEXT:    fcvtzs w9, s6
+; CHECK-CVT-NEXT:    fmaxnm s6, s4, s1
+; CHECK-CVT-NEXT:    fcvtzs w8, s5
+; CHECK-CVT-NEXT:    fmaxnm s5, s16, s1
+; CHECK-CVT-NEXT:    fcvtzs w10, s0
+; CHECK-CVT-NEXT:    fminnm s6, s6, s2
+; CHECK-CVT-NEXT:    csel w8, wzr, w8, vs
+; CHECK-CVT-NEXT:    fcmp s3, s3
+; CHECK-CVT-NEXT:    mov s3, v4.s[1]
+; CHECK-CVT-NEXT:    fminnm s5, s5, s2
+; CHECK-CVT-NEXT:    csel w9, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s7, s7
+; CHECK-CVT-NEXT:    mov s7, v4.s[2]
+; CHECK-CVT-NEXT:    fmov s0, w9
+; CHECK-CVT-NEXT:    fcvtzs w9, s5
+; CHECK-CVT-NEXT:    fmaxnm s5, s3, s1
+; CHECK-CVT-NEXT:    mov v0.b[1], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w10, vs
+; CHECK-CVT-NEXT:    fcmp s16, s16
+; CHECK-CVT-NEXT:    fminnm s5, s5, s2
+; CHECK-CVT-NEXT:    mov v0.b[2], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcvtzs w9, s6
+; CHECK-CVT-NEXT:    fmaxnm s6, s7, s1
+; CHECK-CVT-NEXT:    fcmp s4, s4
+; CHECK-CVT-NEXT:    mov s4, v4.s[3]
+; CHECK-CVT-NEXT:    fcvtzs w10, s5
+; CHECK-CVT-NEXT:    mov v0.b[3], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s3, s3
+; CHECK-CVT-NEXT:    fminnm s5, s6, s2
+; CHECK-CVT-NEXT:    fmaxnm s1, s4, s1
+; CHECK-CVT-NEXT:    mov v0.b[4], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w10, vs
+; CHECK-CVT-NEXT:    fcmp s7, s7
+; CHECK-CVT-NEXT:    fcvtzs w9, s5
+; CHECK-CVT-NEXT:    fminnm s1, s1, s2
+; CHECK-CVT-NEXT:    mov v0.b[5], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s4, s4
+; CHECK-CVT-NEXT:    fcvtzs w9, s1
+; CHECK-CVT-NEXT:    mov v0.b[6], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    mov v0.b[7], w8
+; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_signed_v8f16_v8i8:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    mov h1, v0.h[1]
+; CHECK-FP16-NEXT:    mov w8, #-1023410176
+; CHECK-FP16-NEXT:    fcvt s4, h0
+; CHECK-FP16-NEXT:    mov h6, v0.h[2]
+; CHECK-FP16-NEXT:    mov h7, v0.h[3]
+; CHECK-FP16-NEXT:    mov h17, v0.h[4]
+; CHECK-FP16-NEXT:    fmov s2, w8
+; CHECK-FP16-NEXT:    mov w8, #1123942400
+; CHECK-FP16-NEXT:    fcvt s1, h1
+; CHECK-FP16-NEXT:    mov h18, v0.h[6]
+; CHECK-FP16-NEXT:    fcvt s6, h6
+; CHECK-FP16-NEXT:    fmov s3, w8
+; CHECK-FP16-NEXT:    fmaxnm s16, s4, s2
+; CHECK-FP16-NEXT:    fcvt s7, h7
+; CHECK-FP16-NEXT:    fmaxnm s5, s1, s2
+; CHECK-FP16-NEXT:    fcmp s1, s1
+; CHECK-FP16-NEXT:    mov h1, v0.h[5]
+; CHECK-FP16-NEXT:    mov h0, v0.h[7]
+; CHECK-FP16-NEXT:    fminnm s16, s16, s3
+; CHECK-FP16-NEXT:    fminnm s5, s5, s3
+; CHECK-FP16-NEXT:    fcvt s0, h0
+; CHECK-FP16-NEXT:    fcvtzs w9, s16
+; CHECK-FP16-NEXT:    fmaxnm s16, s7, s2
+; CHECK-FP16-NEXT:    fcvtzs w8, s5
+; CHECK-FP16-NEXT:    fmaxnm s5, s6, s2
+; CHECK-FP16-NEXT:    fminnm s16, s16, s3
+; CHECK-FP16-NEXT:    csel w8, wzr, w8, vs
+; CHECK-FP16-NEXT:    fcmp s4, s4
+; CHECK-FP16-NEXT:    fminnm s4, s5, s3
+; CHECK-FP16-NEXT:    fcvt s5, h17
+; CHECK-FP16-NEXT:    fcvt s17, h1
+; CHECK-FP16-NEXT:    csel w9, wzr, w9, vs
+; CHECK-FP16-NEXT:    fcmp s6, s6
+; CHECK-FP16-NEXT:    fcvtzs w10, s4
+; CHECK-FP16-NEXT:    fmaxnm s4, s5, s2
+; CHECK-FP16-NEXT:    fmov s1, w9
+; CHECK-FP16-NEXT:    fcvtzs w9, s16
+; CHECK-FP16-NEXT:    fmaxnm s6, s17, s2
+; CHECK-FP16-NEXT:    mov v1.b[1], w8
+; CHECK-FP16-NEXT:    csel w8, wzr, w10, vs
+; CHECK-FP16-NEXT:    fcmp s7, s7
+; CHECK-FP16-NEXT:    fcvt s7, h18
+; CHECK-FP16-NEXT:    fminnm s4, s4, s3
+; CHECK-FP16-NEXT:    fminnm s6, s6, s3
+; CHECK-FP16-NEXT:    mov v1.b[2], w8
+; CHECK-FP16-NEXT:    csel w8, wzr, w9, vs
+; CHECK-FP16-NEXT:    fcmp s5, s5
+; CHECK-FP16-NEXT:    fcvtzs w9, s4
+; CHECK-FP16-NEXT:    fmaxnm s4, s7, s2
+; CHECK-FP16-NEXT:    fcvtzs w10, s6
+; CHECK-FP16-NEXT:    fmaxnm s2, s0, s2
+; CHECK-FP16-NEXT:    mov v1.b[3], w8
+; CHECK-FP16-NEXT:    csel w8, wzr, w9, vs
+; CHECK-FP16-NEXT:    fcmp s17, s17
+; CHECK-FP16-NEXT:    fminnm s4, s4, s3
+; CHECK-FP16-NEXT:    fminnm s2, s2, s3
+; CHECK-FP16-NEXT:    mov v1.b[4], w8
+; CHECK-FP16-NEXT:    csel w8, wzr, w10, vs
+; CHECK-FP16-NEXT:    fcmp s7, s7
+; CHECK-FP16-NEXT:    fcvtzs w9, s4
+; CHECK-FP16-NEXT:    mov v1.b[5], w8
+; CHECK-FP16-NEXT:    csel w8, wzr, w9, vs
+; CHECK-FP16-NEXT:    fcvtzs w9, s2
+; CHECK-FP16-NEXT:    fcmp s0, s0
+; CHECK-FP16-NEXT:    mov v1.b[6], w8
+; CHECK-FP16-NEXT:    csel w8, wzr, w9, vs
+; CHECK-FP16-NEXT:    mov v1.b[7], w8
+; CHECK-FP16-NEXT:    fmov d0, d1
+; CHECK-FP16-NEXT:    ret
+    %x = call <8 x i8> @llvm.fptosi.sat.v8f16.v8i8(<8 x half> %f)
+    ret <8 x i8> %x
 }
 
-define <4 x i13> @test_signed_v4f16_v4i13(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i13:
+define <8 x i13> @test_signed_v8f16_v8i13(<8 x half> %f) {
+; CHECK-LABEL: test_signed_v8f16_v8i13:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
 ; CHECK-NEXT:    mov h1, v0.h[1]
 ; CHECK-NEXT:    mov w8, #-981467136
 ; CHECK-NEXT:    fcvt s3, h0
 ; CHECK-NEXT:    mov h6, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    mov h7, v0.h[3]
+; CHECK-NEXT:    mov h17, v0.h[4]
 ; CHECK-NEXT:    fmov s2, w8
 ; CHECK-NEXT:    mov w8, #61440
 ; CHECK-NEXT:    fcvt s1, h1
 ; CHECK-NEXT:    movk w8, #17791, lsl #16
 ; CHECK-NEXT:    fcvt s6, h6
-; CHECK-NEXT:    fmaxnm s7, s3, s2
+; CHECK-NEXT:    mov h18, v0.h[6]
+; CHECK-NEXT:    fmaxnm s16, s3, s2
+; CHECK-NEXT:    fcvt s7, h7
 ; CHECK-NEXT:    fmov s5, w8
 ; CHECK-NEXT:    fmaxnm s4, s1, s2
 ; CHECK-NEXT:    fcmp s1, s1
-; CHECK-NEXT:    fmaxnm s1, s6, s2
-; CHECK-NEXT:    fminnm s7, s7, s5
+; CHECK-NEXT:    mov h1, v0.h[5]
+; CHECK-NEXT:    mov h0, v0.h[7]
+; CHECK-NEXT:    fminnm s16, s16, s5
 ; CHECK-NEXT:    fminnm s4, s4, s5
-; CHECK-NEXT:    fminnm s1, s1, s5
-; CHECK-NEXT:    fcvtzs w9, s7
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    fcvtzs w9, s16
+; CHECK-NEXT:    fmaxnm s16, s7, s2
 ; CHECK-NEXT:    fcvtzs w8, s4
-; CHECK-NEXT:    fcvt s4, h0
+; CHECK-NEXT:    fmaxnm s4, s6, s2
+; CHECK-NEXT:    fminnm s16, s16, s5
 ; CHECK-NEXT:    csel w8, wzr, w8, vs
 ; CHECK-NEXT:    fcmp s3, s3
-; CHECK-NEXT:    fmaxnm s2, s4, s2
+; CHECK-NEXT:    fminnm s3, s4, s5
+; CHECK-NEXT:    fcvt s4, h17
+; CHECK-NEXT:    fcvt s17, h1
 ; CHECK-NEXT:    csel w9, wzr, w9, vs
 ; CHECK-NEXT:    fcmp s6, s6
-; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    fminnm s1, s2, s5
-; CHECK-NEXT:    mov v0.h[1], w8
+; CHECK-NEXT:    fcvtzs w10, s3
+; CHECK-NEXT:    fmaxnm s3, s4, s2
+; CHECK-NEXT:    fmov s1, w9
+; CHECK-NEXT:    fcvtzs w9, s16
+; CHECK-NEXT:    fmaxnm s6, s17, s2
+; CHECK-NEXT:    mov v1.h[1], w8
+; CHECK-NEXT:    csel w8, wzr, w10, vs
+; CHECK-NEXT:    fcmp s7, s7
+; CHECK-NEXT:    fcvt s7, h18
+; CHECK-NEXT:    fminnm s3, s3, s5
+; CHECK-NEXT:    fminnm s6, s6, s5
+; CHECK-NEXT:    mov v1.h[2], w8
 ; CHECK-NEXT:    csel w8, wzr, w9, vs
 ; CHECK-NEXT:    fcmp s4, s4
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzs w9, s3
+; CHECK-NEXT:    fmaxnm s3, s7, s2
+; CHECK-NEXT:    fcvtzs w10, s6
+; CHECK-NEXT:    fmaxnm s2, s0, s2
+; CHECK-NEXT:    mov v1.h[3], w8
 ; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    mov v0.h[3], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fcmp s17, s17
+; CHECK-NEXT:    fminnm s3, s3, s5
+; CHECK-NEXT:    fminnm s2, s2, s5
+; CHECK-NEXT:    mov v1.h[4], w8
+; CHECK-NEXT:    csel w8, wzr, w10, vs
+; CHECK-NEXT:    fcmp s7, s7
+; CHECK-NEXT:    fcvtzs w9, s3
+; CHECK-NEXT:    mov v1.h[5], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    fcvtzs w9, s2
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    mov v1.h[6], w8
+; CHECK-NEXT:    csel w8, wzr, w9, vs
+; CHECK-NEXT:    mov v1.h[7], w8
+; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
-    %x = call <4 x i13> @llvm.fptosi.sat.v4f16.v4i13(<4 x half> %f)
-    ret <4 x i13> %x
+    %x = call <8 x i13> @llvm.fptosi.sat.v8f16.v8i13(<8 x half> %f)
+    ret <8 x i13> %x
 }
 
-define <4 x i16> @test_signed_v4f16_v4i16(<4 x half> %f) {
-; CHECK-CVT-LABEL: test_signed_v4f16_v4i16:
+define <8 x i16> @test_signed_v8f16_v8i16(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v8f16_v8i16:
 ; CHECK-CVT:       // %bb.0:
-; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    fcvtl v1.4s, v0.4h
 ; CHECK-CVT-NEXT:    mov w8, #-956301312
-; CHECK-CVT-NEXT:    fmov s2, w8
+; CHECK-CVT-NEXT:    fmov s3, w8
 ; CHECK-CVT-NEXT:    mov w8, #65024
-; CHECK-CVT-NEXT:    mov s1, v0.s[1]
+; CHECK-CVT-NEXT:    mov s2, v1.s[1]
 ; CHECK-CVT-NEXT:    movk w8, #18175, lsl #16
-; CHECK-CVT-NEXT:    mov s6, v0.s[2]
-; CHECK-CVT-NEXT:    fmaxnm s5, s0, s2
-; CHECK-CVT-NEXT:    fmov s4, w8
-; CHECK-CVT-NEXT:    fmaxnm s3, s1, s2
-; CHECK-CVT-NEXT:    fcmp s1, s1
-; CHECK-CVT-NEXT:    fmaxnm s1, s6, s2
-; CHECK-CVT-NEXT:    fminnm s5, s5, s4
-; CHECK-CVT-NEXT:    fminnm s3, s3, s4
-; CHECK-CVT-NEXT:    fminnm s1, s1, s4
-; CHECK-CVT-NEXT:    fcvtzs w9, s5
-; CHECK-CVT-NEXT:    fcvtzs w8, s3
-; CHECK-CVT-NEXT:    mov s3, v0.s[3]
+; CHECK-CVT-NEXT:    mov s7, v1.s[2]
+; CHECK-CVT-NEXT:    mov s16, v1.s[3]
+; CHECK-CVT-NEXT:    fmaxnm s6, s1, s3
+; CHECK-CVT-NEXT:    fmov s5, w8
+; CHECK-CVT-NEXT:    fmaxnm s4, s2, s3
+; CHECK-CVT-NEXT:    fcmp s2, s2
+; CHECK-CVT-NEXT:    fcvtl2 v2.4s, v0.8h
+; CHECK-CVT-NEXT:    fmaxnm s0, s7, s3
+; CHECK-CVT-NEXT:    fminnm s6, s6, s5
+; CHECK-CVT-NEXT:    fminnm s4, s4, s5
+; CHECK-CVT-NEXT:    fminnm s0, s0, s5
+; CHECK-CVT-NEXT:    fcvtzs w9, s6
+; CHECK-CVT-NEXT:    fmaxnm s6, s2, s3
+; CHECK-CVT-NEXT:    fcvtzs w8, s4
+; CHECK-CVT-NEXT:    fmaxnm s4, s16, s3
+; CHECK-CVT-NEXT:    fcvtzs w10, s0
+; CHECK-CVT-NEXT:    fminnm s6, s6, s5
 ; CHECK-CVT-NEXT:    csel w8, wzr, w8, vs
-; CHECK-CVT-NEXT:    fcmp s0, s0
-; CHECK-CVT-NEXT:    fmaxnm s2, s3, s2
+; CHECK-CVT-NEXT:    fcmp s1, s1
+; CHECK-CVT-NEXT:    mov s1, v2.s[1]
+; CHECK-CVT-NEXT:    fminnm s4, s4, s5
 ; CHECK-CVT-NEXT:    csel w9, wzr, w9, vs
-; CHECK-CVT-NEXT:    fcmp s6, s6
+; CHECK-CVT-NEXT:    fcmp s7, s7
+; CHECK-CVT-NEXT:    mov s7, v2.s[2]
 ; CHECK-CVT-NEXT:    fmov s0, w9
-; CHECK-CVT-NEXT:    fcvtzs w9, s1
-; CHECK-CVT-NEXT:    fminnm s1, s2, s4
+; CHECK-CVT-NEXT:    fcvtzs w9, s4
+; CHECK-CVT-NEXT:    fmaxnm s4, s1, s3
 ; CHECK-CVT-NEXT:    mov v0.h[1], w8
-; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
-; CHECK-CVT-NEXT:    fcmp s3, s3
-; CHECK-CVT-NEXT:    fcvtzs w9, s1
+; CHECK-CVT-NEXT:    csel w8, wzr, w10, vs
+; CHECK-CVT-NEXT:    fcmp s16, s16
+; CHECK-CVT-NEXT:    fminnm s4, s4, s5
 ; CHECK-CVT-NEXT:    mov v0.h[2], w8
 ; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcvtzs w9, s6
+; CHECK-CVT-NEXT:    fmaxnm s6, s7, s3
+; CHECK-CVT-NEXT:    fcmp s2, s2
+; CHECK-CVT-NEXT:    mov s2, v2.s[3]
+; CHECK-CVT-NEXT:    fcvtzs w10, s4
 ; CHECK-CVT-NEXT:    mov v0.h[3], w8
-; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s1, s1
+; CHECK-CVT-NEXT:    fminnm s4, s6, s5
+; CHECK-CVT-NEXT:    fmaxnm s1, s2, s3
+; CHECK-CVT-NEXT:    mov v0.h[4], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w10, vs
+; CHECK-CVT-NEXT:    fcmp s7, s7
+; CHECK-CVT-NEXT:    fcvtzs w9, s4
+; CHECK-CVT-NEXT:    fminnm s1, s1, s5
+; CHECK-CVT-NEXT:    mov v0.h[5], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    fcmp s2, s2
+; CHECK-CVT-NEXT:    fcvtzs w9, s1
+; CHECK-CVT-NEXT:    mov v0.h[6], w8
+; CHECK-CVT-NEXT:    csel w8, wzr, w9, vs
+; CHECK-CVT-NEXT:    mov v0.h[7], w8
 ; CHECK-CVT-NEXT:    ret
 ;
-; CHECK-FP16-LABEL: test_signed_v4f16_v4i16:
+; CHECK-FP16-LABEL: test_signed_v8f16_v8i16:
 ; CHECK-FP16:       // %bb.0:
-; CHECK-FP16-NEXT:    fcvtzs v0.4h, v0.4h
+; CHECK-FP16-NEXT:    fcvtzs v0.8h, v0.8h
 ; CHECK-FP16-NEXT:    ret
-    %x = call <4 x i16> @llvm.fptosi.sat.v4f16.v4i16(<4 x half> %f)
-    ret <4 x i16> %x
+    %x = call <8 x i16> @llvm.fptosi.sat.v8f16.v8i16(<8 x half> %f)
+    ret <8 x i16> %x
 }
 
-define <4 x i19> @test_signed_v4f16_v4i19(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i19:
+define <8 x i19> @test_signed_v8f16_v8i19(<8 x half> %f) {
+; CHECK-LABEL: test_signed_v8f16_v8i19:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    mov h1, v0.h[1]
+; CHECK-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
 ; CHECK-NEXT:    mov w8, #-931135488
-; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    mov h6, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    fmov s2, w8
+; CHECK-NEXT:    fcvt s18, h0
+; CHECK-NEXT:    fmov s4, w8
 ; CHECK-NEXT:    mov w8, #65472
-; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fcvt s2, h1
+; CHECK-NEXT:    mov h3, v1.h[1]
 ; CHECK-NEXT:    movk w8, #18559, lsl #16
-; CHECK-NEXT:    fcvt s6, h6
-; CHECK-NEXT:    fmaxnm s7, s3, s2
-; CHECK-NEXT:    fmov s5, w8
-; CHECK-NEXT:    fmaxnm s4, s1, s2
-; CHECK-NEXT:    fcmp s1, s1
-; CHECK-NEXT:    fmaxnm s1, s6, s2
-; CHECK-NEXT:    fminnm s7, s7, s5
-; CHECK-NEXT:    fminnm s4, s4, s5
-; CHECK-NEXT:    fminnm s1, s1, s5
-; CHECK-NEXT:    fcvtzs w9, s7
-; CHECK-NEXT:    fcvtzs w8, s4
-; CHECK-NEXT:    fcvt s4, h0
-; CHECK-NEXT:    csel w8, wzr, w8, vs
+; CHECK-NEXT:    mov h5, v1.h[2]
+; CHECK-NEXT:    mov h1, v1.h[3]
+; CHECK-NEXT:    fmaxnm s6, s2, s4
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    fmov s7, w8
+; CHECK-NEXT:    fcvt s5, h5
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fcmp s2, s2
+; CHECK-NEXT:    fminnm s6, s6, s7
+; CHECK-NEXT:    fmaxnm s16, s3, s4
+; CHECK-NEXT:    fmaxnm s17, s5, s4
+; CHECK-NEXT:    fcvtzs w8, s6
+; CHECK-NEXT:    fminnm s2, s16, s7
+; CHECK-NEXT:    mov h6, v0.h[1]
+; CHECK-NEXT:    fmaxnm s16, s1, s4
+; CHECK-NEXT:    fminnm s17, s17, s7
+; CHECK-NEXT:    csel w4, wzr, w8, vs
 ; CHECK-NEXT:    fcmp s3, s3
-; CHECK-NEXT:    fmaxnm s2, s4, s2
-; CHECK-NEXT:    csel w9, wzr, w9, vs
-; CHECK-NEXT:    fcmp s6, s6
-; CHECK-NEXT:    fmov s0, w9
-; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    fminnm s1, s2, s5
-; CHECK-NEXT:    mov v0.s[1], w8
-; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    mov h3, v0.h[2]
+; CHECK-NEXT:    fcvtzs w8, s2
+; CHECK-NEXT:    fcvt s2, h6
+; CHECK-NEXT:    fminnm s6, s16, s7
+; CHECK-NEXT:    fmaxnm s16, s18, s4
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fcvtzs w9, s17
+; CHECK-NEXT:    csel w5, wzr, w8, vs
+; CHECK-NEXT:    fcmp s5, s5
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    fmaxnm s5, s2, s4
+; CHECK-NEXT:    fcvtzs w8, s6
+; CHECK-NEXT:    fminnm s6, s16, s7
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    csel w6, wzr, w9, vs
+; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fmaxnm s1, s3, s4
+; CHECK-NEXT:    fminnm s5, s5, s7
+; CHECK-NEXT:    fcvtzs w9, s6
+; CHECK-NEXT:    csel w7, wzr, w8, vs
+; CHECK-NEXT:    fcmp s18, s18
+; CHECK-NEXT:    fmaxnm s4, s0, s4
+; CHECK-NEXT:    fminnm s1, s1, s7
+; CHECK-NEXT:    fcvtzs w8, s5
+; CHECK-NEXT:    csel w0, wzr, w9, vs
+; CHECK-NEXT:    fcmp s2, s2
+; CHECK-NEXT:    fminnm s2, s4, s7
 ; CHECK-NEXT:    fcvtzs w9, s1
-; CHECK-NEXT:    mov v0.s[2], w8
-; CHECK-NEXT:    csel w8, wzr, w9, vs
-; CHECK-NEXT:    mov v0.s[3], w8
+; CHECK-NEXT:    csel w1, wzr, w8, vs
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs w8, s2
+; CHECK-NEXT:    csel w2, wzr, w9, vs
+; CHECK-NEXT:    fcmp s0, s0
+; CHECK-NEXT:    csel w3, wzr, w8, vs
 ; CHECK-NEXT:    ret
-    %x = call <4 x i19> @llvm.fptosi.sat.v4f16.v4i19(<4 x half> %f)
-    ret <4 x i19> %x
+    %x = call <8 x i19> @llvm.fptosi.sat.v8f16.v8i19(<8 x half> %f)
+    ret <8 x i19> %x
 }
 
-define <4 x i32> @test_signed_v4f16_v4i32_duplicate(<4 x half> %f) {
-; CHECK-CVT-LABEL: test_signed_v4f16_v4i32_duplicate:
+define <8 x i32> @test_signed_v8f16_v8i32_duplicate(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v8f16_v8i32_duplicate:
 ; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    fcvtzs v1.4s, v1.4s
 ; CHECK-CVT-NEXT:    fcvtzs v0.4s, v0.4s
 ; CHECK-CVT-NEXT:    ret
 ;
-; CHECK-FP16-LABEL: test_signed_v4f16_v4i32_duplicate:
+; CHECK-FP16-LABEL: test_signed_v8f16_v8i32_duplicate:
 ; CHECK-FP16:       // %bb.0:
-; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-FP16-NEXT:    mov h2, v0.h[1]
-; CHECK-FP16-NEXT:    fcvtzs w8, h0
+; CHECK-FP16-NEXT:    ext v3.16b, v0.16b, v0.16b, #8
+; CHECK-FP16-NEXT:    mov h4, v0.h[1]
+; CHECK-FP16-NEXT:    fcvtzs w9, h0
+; CHECK-FP16-NEXT:    mov h2, v3.h[1]
+; CHECK-FP16-NEXT:    fcvtzs w8, h3
+; CHECK-FP16-NEXT:    mov h5, v3.h[2]
+; CHECK-FP16-NEXT:    mov h3, v3.h[3]
 ; CHECK-FP16-NEXT:    fmov s1, w8
 ; CHECK-FP16-NEXT:    fcvtzs w8, h2
-; CHECK-FP16-NEXT:    mov h2, v0.h[2]
+; CHECK-FP16-NEXT:    fmov s2, w9
+; CHECK-FP16-NEXT:    fcvtzs w9, h4
+; CHECK-FP16-NEXT:    mov h4, v0.h[2]
 ; CHECK-FP16-NEXT:    mov h0, v0.h[3]
 ; CHECK-FP16-NEXT:    mov v1.s[1], w8
-; CHECK-FP16-NEXT:    fcvtzs w8, h2
+; CHECK-FP16-NEXT:    fcvtzs w8, h5
+; CHECK-FP16-NEXT:    mov v2.s[1], w9
+; CHECK-FP16-NEXT:    fcvtzs w9, h4
 ; CHECK-FP16-NEXT:    mov v1.s[2], w8
-; CHECK-FP16-NEXT:    fcvtzs w8, h0
+; CHECK-FP16-NEXT:    fcvtzs w8, h3
+; CHECK-FP16-NEXT:    mov v2.s[2], w9
+; CHECK-FP16-NEXT:    fcvtzs w9, h0
 ; CHECK-FP16-NEXT:    mov v1.s[3], w8
-; CHECK-FP16-NEXT:    mov v0.16b, v1.16b
+; CHECK-FP16-NEXT:    mov v2.s[3], w9
+; CHECK-FP16-NEXT:    mov v0.16b, v2.16b
 ; CHECK-FP16-NEXT:    ret
-    %x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f)
-    ret <4 x i32> %x
+    %x = call <8 x i32> @llvm.fptosi.sat.v8f16.v8i32(<8 x half> %f)
+    ret <8 x i32> %x
 }
 
-define <4 x i50> @test_signed_v4f16_v4i50(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i50:
+define <8 x i50> @test_signed_v8f16_v8i50(<8 x half> %f) {
+; CHECK-LABEL: test_signed_v8f16_v8i50:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov w8, #-671088640
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    fcvt s1, h0
+; CHECK-NEXT:    fcvt s3, h0
 ; CHECK-NEXT:    mov w9, #1476395007
 ; CHECK-NEXT:    mov h4, v0.h[1]
 ; CHECK-NEXT:    mov x10, #562949953421311
 ; CHECK-NEXT:    fmov s2, w8
-; CHECK-NEXT:    fmov s3, w9
-; CHECK-NEXT:    fcvtzs x8, s1
+; CHECK-NEXT:    fmov s1, w9
+; CHECK-NEXT:    fcvtzs x8, s3
 ; CHECK-NEXT:    mov x9, #-562949953421312
 ; CHECK-NEXT:    fcvt s4, h4
-; CHECK-NEXT:    fcmp s1, s2
+; CHECK-NEXT:    fcmp s3, s2
 ; CHECK-NEXT:    csel x8, x9, x8, lt
-; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    fcmp s3, s1
 ; CHECK-NEXT:    fcvtzs x11, s4
 ; CHECK-NEXT:    csel x8, x10, x8, gt
-; CHECK-NEXT:    fcmp s1, s1
-; CHECK-NEXT:    mov h1, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    mov h3, v0.h[2]
 ; CHECK-NEXT:    csel x0, xzr, x8, vs
 ; CHECK-NEXT:    fcmp s4, s2
-; CHECK-NEXT:    fcvt s1, h1
-; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    fcvt s3, h3
 ; CHECK-NEXT:    csel x8, x9, x11, lt
-; CHECK-NEXT:    fcmp s4, s3
+; CHECK-NEXT:    fcmp s4, s1
 ; CHECK-NEXT:    csel x8, x10, x8, gt
 ; CHECK-NEXT:    fcmp s4, s4
-; CHECK-NEXT:    fcvtzs x11, s1
+; CHECK-NEXT:    fcvtzs x11, s3
+; CHECK-NEXT:    mov h4, v0.h[3]
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
 ; CHECK-NEXT:    csel x1, xzr, x8, vs
-; CHECK-NEXT:    fcmp s1, s2
+; CHECK-NEXT:    fcmp s3, s2
+; CHECK-NEXT:    fcvt s4, h4
 ; CHECK-NEXT:    csel x8, x9, x11, lt
-; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    fcmp s3, s1
 ; CHECK-NEXT:    csel x8, x10, x8, gt
-; CHECK-NEXT:    fcmp s1, s1
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs x11, s4
+; CHECK-NEXT:    fcvt s3, h0
 ; CHECK-NEXT:    csel x2, xzr, x8, vs
-; CHECK-NEXT:    fcvtzs x8, s0
+; CHECK-NEXT:    fcmp s4, s2
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s4, s1
+; CHECK-NEXT:    fcvtzs x11, s3
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    mov h4, v0.h[1]
+; CHECK-NEXT:    csel x3, xzr, x8, vs
+; CHECK-NEXT:    fcmp s3, s2
+; CHECK-NEXT:    fcvt s4, h4
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s3, s1
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    fcvtzs x11, s4
+; CHECK-NEXT:    mov h3, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x4, xzr, x8, vs
+; CHECK-NEXT:    fcmp s4, s2
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s4, s1
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s4, s4
+; CHECK-NEXT:    fcvtzs x11, s3
+; CHECK-NEXT:    csel x5, xzr, x8, vs
+; CHECK-NEXT:    fcmp s3, s2
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s3, s1
+; CHECK-NEXT:    fcvtzs x11, s0
+; CHECK-NEXT:    csel x8, x10, x8, gt
+; CHECK-NEXT:    fcmp s3, s3
+; CHECK-NEXT:    csel x6, xzr, x8, vs
 ; CHECK-NEXT:    fcmp s0, s2
-; CHECK-NEXT:    csel x8, x9, x8, lt
-; CHECK-NEXT:    fcmp s0, s3
+; CHECK-NEXT:    csel x8, x9, x11, lt
+; CHECK-NEXT:    fcmp s0, s1
 ; CHECK-NEXT:    csel x8, x10, x8, gt
 ; CHECK-NEXT:    fcmp s0, s0
-; CHECK-NEXT:    csel x3, xzr, x8, vs
+; CHECK-NEXT:    csel x7, xzr, x8, vs
 ; CHECK-NEXT:    ret
-    %x = call <4 x i50> @llvm.fptosi.sat.v4f16.v4i50(<4 x half> %f)
-    ret <4 x i50> %x
+    %x = call <8 x i50> @llvm.fptosi.sat.v8f16.v8i50(<8 x half> %f)
+    ret <8 x i50> %x
 }
 
-define <4 x i64> @test_signed_v4f16_v4i64(<4 x half> %f) {
-; CHECK-CVT-LABEL: test_signed_v4f16_v4i64:
+define <8 x i64> @test_signed_v8f16_v8i64(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_signed_v8f16_v8i64:
 ; CHECK-CVT:       // %bb.0:
-; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-CVT-NEXT:    mov h1, v0.h[2]
-; CHECK-CVT-NEXT:    mov h2, v0.h[1]
-; CHECK-CVT-NEXT:    fcvt s3, h0
-; CHECK-CVT-NEXT:    mov h0, v0.h[3]
-; CHECK-CVT-NEXT:    fcvt s1, h1
-; CHECK-CVT-NEXT:    fcvt s2, h2
-; CHECK-CVT-NEXT:    fcvtzs x8, s3
-; CHECK-CVT-NEXT:    fcvt s3, h0
-; CHECK-CVT-NEXT:    fcvtzs x9, s1
-; CHECK-CVT-NEXT:    fmov d0, x8
+; CHECK-CVT-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-CVT-NEXT:    mov h4, v0.h[2]
+; CHECK-CVT-NEXT:    fcvt s5, h0
+; CHECK-CVT-NEXT:    fcvt s2, h1
+; CHECK-CVT-NEXT:    mov h3, v1.h[1]
+; CHECK-CVT-NEXT:    mov h6, v1.h[2]
+; CHECK-CVT-NEXT:    fcvt s4, h4
+; CHECK-CVT-NEXT:    mov h1, v1.h[3]
+; CHECK-CVT-NEXT:    fcvtzs x9, s5
 ; CHECK-CVT-NEXT:    fcvtzs x8, s2
-; CHECK-CVT-NEXT:    fmov d1, x9
+; CHECK-CVT-NEXT:    fcvt s2, h3
+; CHECK-CVT-NEXT:    mov h3, v0.h[1]
+; CHECK-CVT-NEXT:    mov h0, v0.h[3]
+; CHECK-CVT-NEXT:    fcvt s5, h6
+; CHECK-CVT-NEXT:    fcvt s6, h1
+; CHECK-CVT-NEXT:    fcvtzs x10, s2
+; CHECK-CVT-NEXT:    fmov d2, x8
+; CHECK-CVT-NEXT:    fcvtzs x8, s4
+; CHECK-CVT-NEXT:    fcvt s3, h3
+; CHECK-CVT-NEXT:    fcvt s4, h0
+; CHECK-CVT-NEXT:    fmov d0, x9
+; CHECK-CVT-NEXT:    mov v2.d[1], x10
+; CHECK-CVT-NEXT:    fcvtzs x10, s5
+; CHECK-CVT-NEXT:    fmov d1, x8
 ; CHECK-CVT-NEXT:    fcvtzs x9, s3
-; CHECK-CVT-NEXT:    mov v0.d[1], x8
-; CHECK-CVT-NEXT:    mov v1.d[1], x9
+; CHECK-CVT-NEXT:    fcvtzs x8, s4
+; CHECK-CVT-NEXT:    fmov d3, x10
+; CHECK-CVT-NEXT:    fcvtzs x10, s6
+; CHECK-CVT-NEXT:    mov v0.d[1], x9
+; CHECK-CVT-NEXT:    mov v1.d[1], x8
+; CHECK-CVT-NEXT:    mov v3.d[1], x10
 ; CHECK-CVT-NEXT:    ret
 ;
-; CHECK-FP16-LABEL: test_signed_v4f16_v4i64:
+; CHECK-FP16-LABEL: test_signed_v8f16_v8i64:
 ; CHECK-FP16:       // %bb.0:
-; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-FP16-NEXT:    mov h1, v0.h[2]
-; CHECK-FP16-NEXT:    mov h2, v0.h[1]
-; CHECK-FP16-NEXT:    mov h3, v0.h[3]
-; CHECK-FP16-NEXT:    fcvtzs x8, h0
-; CHECK-FP16-NEXT:    fcvtzs x9, h1
-; CHECK-FP16-NEXT:    fmov d0, x8
-; CHECK-FP16-NEXT:    fcvtzs x8, h2
-; CHECK-FP16-NEXT:    fmov d1, x9
-; CHECK-FP16-NEXT:    fcvtzs x9, h3
-; CHECK-FP16-NEXT:    mov v0.d[1], x8
-; CHECK-FP16-NEXT:    mov v1.d[1], x9
-; CHECK-FP16-NEXT:    ret
-    %x = call <4 x i64> @llvm.fptosi.sat.v4f16.v4i64(<4 x half> %f)
-    ret <4 x i64> %x
-}
-
-define <4 x i100> @test_signed_v4f16_v4i100(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i100:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #112
-; CHECK-NEXT:    str d10, [sp, #16] // 8-byte Folded Spill
-; CHECK-NEXT:    stp d9, d8, [sp, #24] // 16-byte Folded Spill
-; CHECK-NEXT:    str x30, [sp, #40] // 8-byte Folded Spill
-; CHECK-NEXT:    stp x26, x25, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x24, x23, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x22, x21, [sp, #80] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #96] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 112
+; CHECK-FP16-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-FP16-NEXT:    mov h3, v0.h[2]
+; CHECK-FP16-NEXT:    mov h5, v0.h[3]
+; CHECK-FP16-NEXT:    fcvtzs x9, h0
+; CHECK-FP16-NEXT:    mov h2, v1.h[1]
+; CHECK-FP16-NEXT:    fcvtzs x8, h1
+; CHECK-FP16-NEXT:    mov h4, v1.h[2]
+; CHECK-FP16-NEXT:    mov h6, v1.h[3]
+; CHECK-FP16-NEXT:    fcvtzs x10, h2
+; CHECK-FP16-NEXT:    fmov d2, x8
+; CHECK-FP16-NEXT:    fcvtzs x8, h3
+; CHECK-FP16-NEXT:    mov h3, v0.h[1]
+; CHECK-FP16-NEXT:    fmov d0, x9
+; CHECK-FP16-NEXT:    mov v2.d[1], x10
+; CHECK-FP16-NEXT:    fcvtzs x10, h4
+; CHECK-FP16-NEXT:    fmov d1, x8
+; CHECK-FP16-NEXT:    fcvtzs x9, h3
+; CHECK-FP16-NEXT:    fcvtzs x8, h5
+; CHECK-FP16-NEXT:    fmov d3, x10
+; CHECK-FP16-NEXT:    fcvtzs x10, h6
+; CHECK-FP16-NEXT:    mov v0.d[1], x9
+; CHECK-FP16-NEXT:    mov v1.d[1], x8
+; CHECK-FP16-NEXT:    mov v3.d[1], x10
+; CHECK-FP16-NEXT:    ret
+    %x = call <8 x i64> @llvm.fptosi.sat.v8f16.v8i64(<8 x half> %f)
+    ret <8 x i64> %x
+}
+
+define <8 x i100> @test_signed_v8f16_v8i100(<8 x half> %f) {
+; CHECK-LABEL: test_signed_v8f16_v8i100:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #192
+; CHECK-NEXT:    str d10, [sp, #64] // 8-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x29, x30, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x28, x27, [sp, #112] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x26, x25, [sp, #128] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #144] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #160] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #176] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 192
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
@@ -1847,106 +3200,208 @@ define <4 x i100> @test_signed_v4f16_v4i100(<4 x half> %f) {
 ; CHECK-NEXT:    .cfi_offset w24, -48
 ; CHECK-NEXT:    .cfi_offset w25, -56
 ; CHECK-NEXT:    .cfi_offset w26, -64
-; CHECK-NEXT:    .cfi_offset w30, -72
-; CHECK-NEXT:    .cfi_offset b8, -80
-; CHECK-NEXT:    .cfi_offset b9, -88
-; CHECK-NEXT:    .cfi_offset b10, -96
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    mov h1, v0.h[1]
-; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    .cfi_offset w27, -72
+; CHECK-NEXT:    .cfi_offset w28, -80
+; CHECK-NEXT:    .cfi_offset w30, -88
+; CHECK-NEXT:    .cfi_offset w29, -96
+; CHECK-NEXT:    .cfi_offset b8, -104
+; CHECK-NEXT:    .cfi_offset b9, -112
+; CHECK-NEXT:    .cfi_offset b10, -128
+; CHECK-NEXT:    str q0, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    mov x19, x8
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    str q0, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    fcvt s8, h0
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    mov w8, #-251658240
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov x25, #-34359738368
-; CHECK-NEXT:    mov x26, #34359738367
-; CHECK-NEXT:    fmov s9, w8
-; CHECK-NEXT:    mov w8, #1895825407
-; CHECK-NEXT:    mov h0, v0.h[2]
-; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    mov x23, #34359738367
 ; CHECK-NEXT:    fmov s10, w8
+; CHECK-NEXT:    mov w8, #1895825407
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    fmov s9, w8
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, x25, x1, lt
-; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x23, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x19, xzr, x8, vs
-; CHECK-NEXT:    csel x20, xzr, x9, vs
+; CHECK-NEXT:    csel x8, xzr, x8, vs
 ; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp, #24] // 8-byte Folded Spill
+; CHECK-NEXT:    csel x8, xzr, x9, vs
+; CHECK-NEXT:    str x8, [sp, #72] // 8-byte Folded Spill
 ; CHECK-NEXT:    bl __fixsfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, x25, x1, lt
-; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x23, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x21, xzr, x8, vs
+; CHECK-NEXT:    csel x8, xzr, x8, vs
 ; CHECK-NEXT:    csel x22, xzr, x9, vs
 ; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp, #16] // 8-byte Folded Spill
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    csel x8, x25, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x23, x8, gt
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x24, xzr, x8, vs
+; CHECK-NEXT:    csel x8, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp, #32] // 8-byte Folded Spill
 ; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    csel x8, x25, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x23, x8, gt
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x27, xzr, x8, vs
+; CHECK-NEXT:    csel x8, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp, #8] // 8-byte Folded Spill
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov h0, v0.h[3]
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, x25, x1, lt
-; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x23, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x23, xzr, x8, vs
-; CHECK-NEXT:    csel x24, xzr, x9, vs
+; CHECK-NEXT:    csel x8, xzr, x8, vs
+; CHECK-NEXT:    csel x29, xzr, x9, vs
 ; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp] // 8-byte Folded Spill
 ; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x25, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    mov x2, x19
-; CHECK-NEXT:    mov x3, x20
-; CHECK-NEXT:    mov x4, x21
-; CHECK-NEXT:    mov x5, x22
-; CHECK-NEXT:    mov x6, x23
+; CHECK-NEXT:    csel x9, x23, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x20, xzr, x8, vs
+; CHECK-NEXT:    csel x28, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov h0, v0.h[2]
 ; CHECK-NEXT:    csel x8, x25, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x8, x23, x8, gt
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x21, xzr, x8, vs
+; CHECK-NEXT:    csel x26, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fmov d0, x20
 ; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    mov x7, x24
-; CHECK-NEXT:    ldp x20, x19, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr x11, [sp, #8] // 8-byte Folded Reload
+; CHECK-NEXT:    lsr x10, x28, #28
+; CHECK-NEXT:    ldr d1, [sp] // 8-byte Folded Reload
+; CHECK-NEXT:    lsr x12, x29, #28
+; CHECK-NEXT:    mov v0.d[1], x28
+; CHECK-NEXT:    csel x8, x25, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    stur x11, [x19, #75]
+; CHECK-NEXT:    ldr x13, [sp, #32] // 8-byte Folded Reload
 ; CHECK-NEXT:    csinv x9, x9, xzr, le
-; CHECK-NEXT:    csel x8, x26, x8, gt
+; CHECK-NEXT:    csel x8, x23, x8, gt
 ; CHECK-NEXT:    fcmp s8, s8
-; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x22, x21, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov x11, d0
+; CHECK-NEXT:    stur x13, [x19, #50]
+; CHECK-NEXT:    mov v1.d[1], x29
+; CHECK-NEXT:    ldr d0, [sp, #16] // 8-byte Folded Reload
 ; CHECK-NEXT:    csel x9, xzr, x9, vs
-; CHECK-NEXT:    csel x1, xzr, x8, vs
-; CHECK-NEXT:    ldp x24, x23, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov d0, x9
-; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x26, x25, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT:    mov v0.d[1], x1
-; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #112
+; CHECK-NEXT:    strb w10, [x19, #49]
+; CHECK-NEXT:    extr x10, x28, x11, #28
+; CHECK-NEXT:    csel x8, xzr, x8, vs
+; CHECK-NEXT:    bfi x8, x11, #36, #28
+; CHECK-NEXT:    strb w12, [x19, #24]
+; CHECK-NEXT:    stur x9, [x19, #25]
+; CHECK-NEXT:    fmov x12, d1
+; CHECK-NEXT:    stur x10, [x19, #41]
+; CHECK-NEXT:    lsr x9, x22, #28
+; CHECK-NEXT:    ldr d1, [sp, #24] // 8-byte Folded Reload
+; CHECK-NEXT:    stur x8, [x19, #33]
+; CHECK-NEXT:    ldr x11, [sp, #72] // 8-byte Folded Reload
+; CHECK-NEXT:    extr x18, x29, x12, #28
+; CHECK-NEXT:    mov v0.d[1], x22
+; CHECK-NEXT:    bfi x21, x12, #36, #28
+; CHECK-NEXT:    str x26, [x19]
+; CHECK-NEXT:    mov v1.d[1], x11
+; CHECK-NEXT:    lsr x10, x11, #28
+; CHECK-NEXT:    mov x13, x11
+; CHECK-NEXT:    stp x21, x18, [x19, #8]
+; CHECK-NEXT:    fmov x8, d0
+; CHECK-NEXT:    strb w9, [x19, #99]
+; CHECK-NEXT:    strb w10, [x19, #74]
+; CHECK-NEXT:    fmov x11, d1
+; CHECK-NEXT:    extr x12, x22, x8, #28
+; CHECK-NEXT:    bfi x27, x8, #36, #28
+; CHECK-NEXT:    extr x8, x13, x11, #28
+; CHECK-NEXT:    bfi x24, x11, #36, #28
+; CHECK-NEXT:    stur x12, [x19, #91]
+; CHECK-NEXT:    stur x27, [x19, #83]
+; CHECK-NEXT:    stur x8, [x19, #66]
+; CHECK-NEXT:    stur x24, [x19, #58]
+; CHECK-NEXT:    ldp x20, x19, [sp, #176] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #160] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #144] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x26, x25, [sp, #128] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x28, x27, [sp, #112] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x29, x30, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d9, d8, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr d10, [sp, #64] // 8-byte Folded Reload
+; CHECK-NEXT:    add sp, sp, #192
 ; CHECK-NEXT:    ret
-    %x = call <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half> %f)
-    ret <4 x i100> %x
+    %x = call <8 x i100> @llvm.fptosi.sat.v8f16.v8i100(<8 x half> %f)
+    ret <8 x i100> %x
 }
 
-define <4 x i128> @test_signed_v4f16_v4i128(<4 x half> %f) {
-; CHECK-LABEL: test_signed_v4f16_v4i128:
+define <8 x i128> @test_signed_v8f16_v8i128(<8 x half> %f) {
+; CHECK-LABEL: test_signed_v8f16_v8i128:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #112
-; CHECK-NEXT:    str d10, [sp, #16] // 8-byte Folded Spill
-; CHECK-NEXT:    stp d9, d8, [sp, #24] // 16-byte Folded Spill
-; CHECK-NEXT:    str x30, [sp, #40] // 8-byte Folded Spill
-; CHECK-NEXT:    stp x26, x25, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x24, x23, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x22, x21, [sp, #80] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #96] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 112
+; CHECK-NEXT:    sub sp, sp, #192
+; CHECK-NEXT:    str d10, [sp, #64] // 8-byte Folded Spill
+; CHECK-NEXT:    stp d9, d8, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x29, x30, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x28, x27, [sp, #112] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x26, x25, [sp, #128] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #144] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #160] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #176] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 192
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
@@ -1955,91 +3410,166 @@ define <4 x i128> @test_signed_v4f16_v4i128(<4 x half> %f) {
 ; CHECK-NEXT:    .cfi_offset w24, -48
 ; CHECK-NEXT:    .cfi_offset w25, -56
 ; CHECK-NEXT:    .cfi_offset w26, -64
-; CHECK-NEXT:    .cfi_offset w30, -72
-; CHECK-NEXT:    .cfi_offset b8, -80
-; CHECK-NEXT:    .cfi_offset b9, -88
-; CHECK-NEXT:    .cfi_offset b10, -96
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    mov h1, v0.h[1]
-; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    .cfi_offset w27, -72
+; CHECK-NEXT:    .cfi_offset w28, -80
+; CHECK-NEXT:    .cfi_offset w30, -88
+; CHECK-NEXT:    .cfi_offset w29, -96
+; CHECK-NEXT:    .cfi_offset b8, -104
+; CHECK-NEXT:    .cfi_offset b9, -112
+; CHECK-NEXT:    .cfi_offset b10, -128
+; CHECK-NEXT:    str q0, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    mov x19, x8
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    str q0, [sp, #32] // 16-byte Folded Spill
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    mov w8, #-16777216
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x25, #-9223372036854775808
-; CHECK-NEXT:    mov x26, #9223372036854775807
-; CHECK-NEXT:    fmov s9, w8
-; CHECK-NEXT:    mov w8, #2130706431
-; CHECK-NEXT:    mov h0, v0.h[2]
-; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x21, #-9223372036854775808
+; CHECK-NEXT:    mov x22, #9223372036854775807
 ; CHECK-NEXT:    fmov s10, w8
+; CHECK-NEXT:    mov w8, #2130706431
+; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    fmov s9, w8
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x8, xzr, x8, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp, #72] // 8-byte Folded Spill
+; CHECK-NEXT:    csel x8, xzr, x9, vs
+; CHECK-NEXT:    str x8, [sp, #24] // 8-byte Folded Spill
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x22, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x19, xzr, x8, vs
-; CHECK-NEXT:    csel x20, xzr, x9, vs
+; CHECK-NEXT:    csel x10, xzr, x8, vs
+; CHECK-NEXT:    csel x8, xzr, x9, vs
 ; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    stp x8, x10, [sp, #8] // 16-byte Folded Spill
 ; CHECK-NEXT:    bl __fixsfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, x25, x1, lt
-; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    csel x9, x22, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x21, xzr, x8, vs
-; CHECK-NEXT:    csel x22, xzr, x9, vs
+; CHECK-NEXT:    csel x8, xzr, x8, vs
 ; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x8, [sp, #32] // 8-byte Folded Spill
+; CHECK-NEXT:    csel x8, xzr, x9, vs
+; CHECK-NEXT:    str x8, [sp] // 8-byte Folded Spill
 ; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x28, xzr, x8, vs
+; CHECK-NEXT:    csel x29, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov h0, v0.h[1]
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, x25, x1, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x20, xzr, x8, vs
+; CHECK-NEXT:    csel x23, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    csel x9, x26, x9, gt
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x9, x22, x9, gt
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x23, xzr, x8, vs
-; CHECK-NEXT:    csel x24, xzr, x9, vs
+; CHECK-NEXT:    csel x24, xzr, x8, vs
+; CHECK-NEXT:    csel x25, xzr, x9, vs
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s10
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    mov x2, x19
-; CHECK-NEXT:    mov x3, x20
-; CHECK-NEXT:    mov x4, x21
-; CHECK-NEXT:    mov x5, x22
-; CHECK-NEXT:    mov x6, x23
-; CHECK-NEXT:    csel x8, x25, x1, lt
-; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fcmp s8, s8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x26, xzr, x8, vs
+; CHECK-NEXT:    csel x27, xzr, x9, vs
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    fcmp s8, s10
-; CHECK-NEXT:    mov x7, x24
-; CHECK-NEXT:    ldp x20, x19, [sp, #96] // 16-byte Folded Reload
-; CHECK-NEXT:    csinv x9, x9, xzr, le
-; CHECK-NEXT:    csel x8, x26, x8, gt
+; CHECK-NEXT:    stp x26, x27, [x19, #32]
+; CHECK-NEXT:    stp x24, x25, [x19, #16]
+; CHECK-NEXT:    stp x20, x23, [x19]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, x21, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    stp x28, x29, [x19, #112]
+; CHECK-NEXT:    ldr x10, [sp] // 8-byte Folded Reload
+; CHECK-NEXT:    csel x9, x22, x9, gt
+; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fcmp s8, s8
-; CHECK-NEXT:    ldr x30, [sp, #40] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x22, x21, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    str x10, [x19, #104]
+; CHECK-NEXT:    ldr x10, [sp, #32] // 8-byte Folded Reload
 ; CHECK-NEXT:    csel x9, xzr, x9, vs
-; CHECK-NEXT:    csel x1, xzr, x8, vs
-; CHECK-NEXT:    ldp x24, x23, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov d0, x9
-; CHECK-NEXT:    ldr d10, [sp, #16] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x26, x25, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT:    mov v0.d[1], x1
-; CHECK-NEXT:    ldp d9, d8, [sp, #24] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #112
+; CHECK-NEXT:    csel x8, xzr, x8, vs
+; CHECK-NEXT:    str x10, [x19, #96]
+; CHECK-NEXT:    stp x8, x9, [x19, #48]
+; CHECK-NEXT:    ldr x8, [sp, #8] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #88]
+; CHECK-NEXT:    ldr x8, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #80]
+; CHECK-NEXT:    ldr x8, [sp, #24] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #72]
+; CHECK-NEXT:    ldr x8, [sp, #72] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #64]
+; CHECK-NEXT:    ldp x20, x19, [sp, #176] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #160] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #144] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x26, x25, [sp, #128] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x28, x27, [sp, #112] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x29, x30, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d9, d8, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr d10, [sp, #64] // 8-byte Folded Reload
+; CHECK-NEXT:    add sp, sp, #192
 ; CHECK-NEXT:    ret
-    %x = call <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half> %f)
-    ret <4 x i128> %x
+    %x = call <8 x i128> @llvm.fptosi.sat.v8f16.v8i128(<8 x half> %f)
+    ret <8 x i128> %x
 }
 
+

diff  --git a/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll b/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
index 326c57f976847..505065540e028 100644
--- a/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
+++ b/llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
@@ -1010,583 +1010,1675 @@ define <2 x i128> @test_unsigned_v2f32_v2i128(<2 x float> %f) {
 }
 
 ;
-; 2-Vector double to unsigned integer -- result size variation
+; 4-Vector float to unsigned integer -- result size variation
 ;
 
-declare <2 x   i1> @llvm.fptoui.sat.v2f64.v2i1  (<2 x double>)
-declare <2 x   i8> @llvm.fptoui.sat.v2f64.v2i8  (<2 x double>)
-declare <2 x  i13> @llvm.fptoui.sat.v2f64.v2i13 (<2 x double>)
-declare <2 x  i16> @llvm.fptoui.sat.v2f64.v2i16 (<2 x double>)
-declare <2 x  i19> @llvm.fptoui.sat.v2f64.v2i19 (<2 x double>)
-declare <2 x  i50> @llvm.fptoui.sat.v2f64.v2i50 (<2 x double>)
-declare <2 x  i64> @llvm.fptoui.sat.v2f64.v2i64 (<2 x double>)
-declare <2 x i100> @llvm.fptoui.sat.v2f64.v2i100(<2 x double>)
-declare <2 x i128> @llvm.fptoui.sat.v2f64.v2i128(<2 x double>)
-
-define <2 x i1> @test_unsigned_v2f64_v2i1(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i1:
+declare <4 x   i1> @llvm.fptoui.sat.v4f32.v4i1  (<4 x float>)
+declare <4 x   i8> @llvm.fptoui.sat.v4f32.v4i8  (<4 x float>)
+declare <4 x  i13> @llvm.fptoui.sat.v4f32.v4i13 (<4 x float>)
+declare <4 x  i16> @llvm.fptoui.sat.v4f32.v4i16 (<4 x float>)
+declare <4 x  i19> @llvm.fptoui.sat.v4f32.v4i19 (<4 x float>)
+declare <4 x  i50> @llvm.fptoui.sat.v4f32.v4i50 (<4 x float>)
+declare <4 x  i64> @llvm.fptoui.sat.v4f32.v4i64 (<4 x float>)
+declare <4 x i100> @llvm.fptoui.sat.v4f32.v4i100(<4 x float>)
+declare <4 x i128> @llvm.fptoui.sat.v4f32.v4i128(<4 x float>)
+
+define <4 x i1> @test_unsigned_v4f32_v4i1(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i1:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    mov d2, v0.d[1]
-; CHECK-NEXT:    fmov d3, #1.00000000
-; CHECK-NEXT:    fmaxnm d0, d0, d1
-; CHECK-NEXT:    fmaxnm d1, d2, d1
-; CHECK-NEXT:    fminnm d0, d0, d3
-; CHECK-NEXT:    fminnm d1, d1, d3
-; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    fmov s4, #1.00000000
+; CHECK-NEXT:    mov s5, v0.s[2]
+; CHECK-NEXT:    fmaxnm s3, s0, s1
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fminnm s2, s5, s4
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i1> @llvm.fptoui.sat.v2f64.v2i1(<2 x double> %f)
-    ret <2 x i1> %x
+    %x = call <4 x i1> @llvm.fptoui.sat.v4f32.v4i1(<4 x float> %f)
+    ret <4 x i1> %x
 }
 
-define <2 x i8> @test_unsigned_v2f64_v2i8(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i8:
+define <4 x i8> @test_unsigned_v4f32_v4i8(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    mov x8, #246290604621824
-; CHECK-NEXT:    movk x8, #16495, lsl #48
-; CHECK-NEXT:    mov d2, v0.d[1]
-; CHECK-NEXT:    fmaxnm d0, d0, d1
-; CHECK-NEXT:    fmov d3, x8
-; CHECK-NEXT:    fmaxnm d1, d2, d1
-; CHECK-NEXT:    fminnm d0, d0, d3
-; CHECK-NEXT:    fminnm d1, d1, d3
-; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    mov w8, #1132396544
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    mov s5, v0.s[2]
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s3, s0, s1
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fminnm s2, s5, s4
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i8> @llvm.fptoui.sat.v2f64.v2i8(<2 x double> %f)
-    ret <2 x i8> %x
+    %x = call <4 x i8> @llvm.fptoui.sat.v4f32.v4i8(<4 x float> %f)
+    ret <4 x i8> %x
 }
 
-define <2 x i13> @test_unsigned_v2f64_v2i13(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i13:
+define <4 x i13> @test_unsigned_v4f32_v4i13(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i13:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    mov x8, #280375465082880
-; CHECK-NEXT:    movk x8, #16575, lsl #48
-; CHECK-NEXT:    mov d2, v0.d[1]
-; CHECK-NEXT:    fmaxnm d0, d0, d1
-; CHECK-NEXT:    fmov d3, x8
-; CHECK-NEXT:    fmaxnm d1, d2, d1
-; CHECK-NEXT:    fminnm d0, d0, d3
-; CHECK-NEXT:    fminnm d1, d1, d3
-; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    mov w8, #63488
+; CHECK-NEXT:    movk w8, #17919, lsl #16
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    mov s5, v0.s[2]
+; CHECK-NEXT:    fmaxnm s3, s0, s1
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fminnm s2, s5, s4
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i13> @llvm.fptoui.sat.v2f64.v2i13(<2 x double> %f)
-    ret <2 x i13> %x
+    %x = call <4 x i13> @llvm.fptoui.sat.v4f32.v4i13(<4 x float> %f)
+    ret <4 x i13> %x
 }
 
-define <2 x i16> @test_unsigned_v2f64_v2i16(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i16:
+define <4 x i16> @test_unsigned_v4f32_v4i16(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    mov x8, #281337537757184
-; CHECK-NEXT:    movk x8, #16623, lsl #48
-; CHECK-NEXT:    mov d2, v0.d[1]
-; CHECK-NEXT:    fmaxnm d0, d0, d1
-; CHECK-NEXT:    fmov d3, x8
-; CHECK-NEXT:    fmaxnm d1, d2, d1
-; CHECK-NEXT:    fminnm d0, d0, d3
-; CHECK-NEXT:    fminnm d1, d1, d3
-; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    mov w8, #65280
+; CHECK-NEXT:    movk w8, #18303, lsl #16
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    mov s5, v0.s[2]
+; CHECK-NEXT:    fmaxnm s3, s0, s1
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fminnm s2, s5, s4
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    ret
-    %x = call <2 x i16> @llvm.fptoui.sat.v2f64.v2i16(<2 x double> %f)
-    ret <2 x i16> %x
+    %x = call <4 x i16> @llvm.fptoui.sat.v4f32.v4i16(<4 x float> %f)
+    ret <4 x i16> %x
 }
 
-define <2 x i19> @test_unsigned_v2f64_v2i19(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i19:
+define <4 x i19> @test_unsigned_v4f32_v4i19(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i19:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    mov x8, #281457796841472
-; CHECK-NEXT:    movk x8, #16671, lsl #48
-; CHECK-NEXT:    mov d2, v0.d[1]
-; CHECK-NEXT:    fmaxnm d0, d0, d1
-; CHECK-NEXT:    fmov d3, x8
-; CHECK-NEXT:    fmaxnm d1, d2, d1
-; CHECK-NEXT:    fminnm d0, d0, d3
-; CHECK-NEXT:    fminnm d1, d1, d3
-; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    mov w8, #65504
+; CHECK-NEXT:    movk w8, #18687, lsl #16
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    mov s5, v0.s[2]
+; CHECK-NEXT:    fmaxnm s3, s0, s1
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fminnm s3, s3, s4
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov s3, v0.s[3]
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fminnm s2, s5, s4
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.s[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov v0.s[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.s[3], w8
 ; CHECK-NEXT:    ret
-    %x = call <2 x i19> @llvm.fptoui.sat.v2f64.v2i19(<2 x double> %f)
-    ret <2 x i19> %x
+    %x = call <4 x i19> @llvm.fptoui.sat.v4f32.v4i19(<4 x float> %f)
+    ret <4 x i19> %x
 }
 
-define <2 x i32> @test_unsigned_v2f64_v2i32_duplicate(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i32_duplicate:
+define <4 x i32> @test_unsigned_v4f32_v4i32_duplicate(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i32_duplicate:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    fcvtzu w8, d0
-; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w8, d1
-; CHECK-NEXT:    mov v0.s[1], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fcvtzu v0.4s, v0.4s
 ; CHECK-NEXT:    ret
-    %x = call <2 x i32> @llvm.fptoui.sat.v2f64.v2i32(<2 x double> %f)
-    ret <2 x i32> %x
+    %x = call <4 x i32> @llvm.fptoui.sat.v4f32.v4i32(<4 x float> %f)
+    ret <4 x i32> %x
 }
 
-define <2 x i50> @test_unsigned_v2f64_v2i50(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i50:
+define <4 x i50> @test_unsigned_v4f32_v4i50(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i50:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    mov x8, #-8
-; CHECK-NEXT:    movk x8, #17167, lsl #48
-; CHECK-NEXT:    mov d2, v0.d[1]
-; CHECK-NEXT:    fmaxnm d0, d0, d1
-; CHECK-NEXT:    fmov d3, x8
-; CHECK-NEXT:    fmaxnm d1, d2, d1
-; CHECK-NEXT:    fminnm d0, d0, d3
-; CHECK-NEXT:    fminnm d1, d1, d3
-; CHECK-NEXT:    fcvtzu x8, d0
-; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    fcvtzu x8, d1
-; CHECK-NEXT:    mov v0.d[1], x8
+; CHECK-NEXT:    mov w8, #1484783615
+; CHECK-NEXT:    fcvtzu x9, s0
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    fmov s1, w8
+; CHECK-NEXT:    csel x8, xzr, x9, lt
+; CHECK-NEXT:    mov x9, #1125899906842623
+; CHECK-NEXT:    fcvtzu x10, s2
+; CHECK-NEXT:    fcmp s0, s1
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    csel x0, x9, x8, gt
+; CHECK-NEXT:    fcmp s2, #0.0
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s2, s1
+; CHECK-NEXT:    fcvtzu x10, s0
+; CHECK-NEXT:    mov s2, v0.s[1]
+; CHECK-NEXT:    csel x1, x9, x8, gt
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s0, s1
+; CHECK-NEXT:    csel x2, x9, x8, gt
+; CHECK-NEXT:    fcvtzu x8, s2
+; CHECK-NEXT:    fcmp s2, #0.0
+; CHECK-NEXT:    csel x8, xzr, x8, lt
+; CHECK-NEXT:    fcmp s2, s1
+; CHECK-NEXT:    csel x3, x9, x8, gt
 ; CHECK-NEXT:    ret
-    %x = call <2 x i50> @llvm.fptoui.sat.v2f64.v2i50(<2 x double> %f)
-    ret <2 x i50> %x
+    %x = call <4 x i50> @llvm.fptoui.sat.v4f32.v4i50(<4 x float> %f)
+    ret <4 x i50> %x
 }
 
-define <2 x i64> @test_unsigned_v2f64_v2i64(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i64:
+define <4 x i64> @test_unsigned_v4f32_v4i64(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i64:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
+; CHECK-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    mov s3, v0.s[1]
+; CHECK-NEXT:    fcvtzu x9, s0
+; CHECK-NEXT:    mov s2, v1.s[1]
+; CHECK-NEXT:    fcvtzu x8, s1
+; CHECK-NEXT:    fmov d0, x9
+; CHECK-NEXT:    fcvtzu x9, s3
+; CHECK-NEXT:    fmov d1, x8
+; CHECK-NEXT:    fcvtzu x8, s2
+; CHECK-NEXT:    mov v0.d[1], x9
+; CHECK-NEXT:    mov v1.d[1], x8
 ; CHECK-NEXT:    ret
-    %x = call <2 x i64> @llvm.fptoui.sat.v2f64.v2i64(<2 x double> %f)
-    ret <2 x i64> %x
+    %x = call <4 x i64> @llvm.fptoui.sat.v4f32.v4i64(<4 x float> %f)
+    ret <4 x i64> %x
 }
 
-define <2 x i100> @test_unsigned_v2f64_v2i100(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i100:
+define <4 x i100> @test_unsigned_v4f32_v4i100(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i100:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #64
-; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x30, x21, [sp, #32] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 64
+; CHECK-NEXT:    sub sp, sp, #112
+; CHECK-NEXT:    stp d9, d8, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x30, x25, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 112
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
-; CHECK-NEXT:    .cfi_offset w30, -32
-; CHECK-NEXT:    .cfi_offset b8, -40
-; CHECK-NEXT:    .cfi_offset b9, -48
-; CHECK-NEXT:    mov d8, v0.d[1]
-; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fmov d0, d8
-; CHECK-NEXT:    bl __fixunsdfti
-; CHECK-NEXT:    mov x8, #5057542381537067007
-; CHECK-NEXT:    fcmp d8, #0.0
-; CHECK-NEXT:    mov x21, #68719476735
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    fmov d9, x8
-; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, xzr, x1, lt
-; CHECK-NEXT:    fcmp d8, d9
-; CHECK-NEXT:    csel x19, x21, x9, gt
-; CHECK-NEXT:    csinv x20, x8, xzr, le
-; CHECK-NEXT:    bl __fixunsdfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x2, x20
-; CHECK-NEXT:    mov x3, x19
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w30, -64
+; CHECK-NEXT:    .cfi_offset b8, -72
+; CHECK-NEXT:    .cfi_offset b9, -80
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    str q0, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    mov w8, #1904214015
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov x25, #68719476735
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x19, x25, x9, gt
+; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    csel x21, x25, x9, gt
+; CHECK-NEXT:    csinv x22, x8, xzr, le
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csel x23, x25, x9, gt
+; CHECK-NEXT:    csinv x24, x8, xzr, le
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x20
+; CHECK-NEXT:    mov x3, x19
+; CHECK-NEXT:    mov x4, x22
+; CHECK-NEXT:    mov x5, x21
+; CHECK-NEXT:    mov x6, x24
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    mov x7, x23
+; CHECK-NEXT:    ldp x20, x19, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    ldp x22, x21, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csel x1, x25, x9, gt
+; CHECK-NEXT:    ldp x24, x23, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    ldp x30, x25, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    ldp d9, d8, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #112
+; CHECK-NEXT:    ret
+    %x = call <4 x i100> @llvm.fptoui.sat.v4f32.v4i100(<4 x float> %f)
+    ret <4 x i100> %x
+}
+
+define <4 x i128> @test_unsigned_v4f32_v4i128(<4 x float> %f) {
+; CHECK-LABEL: test_unsigned_v4f32_v4i128:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #112
+; CHECK-NEXT:    stp d9, d8, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    str x30, [sp, #48] // 8-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 112
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w30, -64
+; CHECK-NEXT:    .cfi_offset b8, -72
+; CHECK-NEXT:    .cfi_offset b9, -80
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    str q0, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    mov w8, #2139095039
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csinv x19, x9, xzr, le
+; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov s8, v0.s[1]
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    csinv x21, x9, xzr, le
+; CHECK-NEXT:    csinv x22, x8, xzr, le
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    csinv x23, x9, xzr, le
+; CHECK-NEXT:    csinv x24, x8, xzr, le
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x19
+; CHECK-NEXT:    mov x3, x20
+; CHECK-NEXT:    mov x4, x21
+; CHECK-NEXT:    mov x5, x22
+; CHECK-NEXT:    mov x6, x23
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    mov x7, x24
+; CHECK-NEXT:    ldp x20, x19, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s0, s9
+; CHECK-NEXT:    ldr x30, [sp, #48] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csinv x1, x9, xzr, le
+; CHECK-NEXT:    ldp x24, x23, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    ldp d9, d8, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #112
+; CHECK-NEXT:    ret
+    %x = call <4 x i128> @llvm.fptoui.sat.v4f32.v4i128(<4 x float> %f)
+    ret <4 x i128> %x
+}
+
+;
+; 2-Vector double to unsigned integer -- result size variation
+;
+
+declare <2 x   i1> @llvm.fptoui.sat.v2f64.v2i1  (<2 x double>)
+declare <2 x   i8> @llvm.fptoui.sat.v2f64.v2i8  (<2 x double>)
+declare <2 x  i13> @llvm.fptoui.sat.v2f64.v2i13 (<2 x double>)
+declare <2 x  i16> @llvm.fptoui.sat.v2f64.v2i16 (<2 x double>)
+declare <2 x  i19> @llvm.fptoui.sat.v2f64.v2i19 (<2 x double>)
+declare <2 x  i50> @llvm.fptoui.sat.v2f64.v2i50 (<2 x double>)
+declare <2 x  i64> @llvm.fptoui.sat.v2f64.v2i64 (<2 x double>)
+declare <2 x i100> @llvm.fptoui.sat.v2f64.v2i100(<2 x double>)
+declare <2 x i128> @llvm.fptoui.sat.v2f64.v2i128(<2 x double>)
+
+define <2 x i1> @test_unsigned_v2f64_v2i1(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    mov d2, v0.d[1]
+; CHECK-NEXT:    fmov d3, #1.00000000
+; CHECK-NEXT:    fmaxnm d0, d0, d1
+; CHECK-NEXT:    fmaxnm d1, d2, d1
+; CHECK-NEXT:    fminnm d0, d0, d3
+; CHECK-NEXT:    fminnm d1, d1, d3
+; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i1> @llvm.fptoui.sat.v2f64.v2i1(<2 x double> %f)
+    ret <2 x i1> %x
+}
+
+define <2 x i8> @test_unsigned_v2f64_v2i8(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    mov x8, #246290604621824
+; CHECK-NEXT:    movk x8, #16495, lsl #48
+; CHECK-NEXT:    mov d2, v0.d[1]
+; CHECK-NEXT:    fmaxnm d0, d0, d1
+; CHECK-NEXT:    fmov d3, x8
+; CHECK-NEXT:    fmaxnm d1, d2, d1
+; CHECK-NEXT:    fminnm d0, d0, d3
+; CHECK-NEXT:    fminnm d1, d1, d3
+; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i8> @llvm.fptoui.sat.v2f64.v2i8(<2 x double> %f)
+    ret <2 x i8> %x
+}
+
+define <2 x i13> @test_unsigned_v2f64_v2i13(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i13:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    mov x8, #280375465082880
+; CHECK-NEXT:    movk x8, #16575, lsl #48
+; CHECK-NEXT:    mov d2, v0.d[1]
+; CHECK-NEXT:    fmaxnm d0, d0, d1
+; CHECK-NEXT:    fmov d3, x8
+; CHECK-NEXT:    fmaxnm d1, d2, d1
+; CHECK-NEXT:    fminnm d0, d0, d3
+; CHECK-NEXT:    fminnm d1, d1, d3
+; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i13> @llvm.fptoui.sat.v2f64.v2i13(<2 x double> %f)
+    ret <2 x i13> %x
+}
+
+define <2 x i16> @test_unsigned_v2f64_v2i16(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    mov x8, #281337537757184
+; CHECK-NEXT:    movk x8, #16623, lsl #48
+; CHECK-NEXT:    mov d2, v0.d[1]
+; CHECK-NEXT:    fmaxnm d0, d0, d1
+; CHECK-NEXT:    fmov d3, x8
+; CHECK-NEXT:    fmaxnm d1, d2, d1
+; CHECK-NEXT:    fminnm d0, d0, d3
+; CHECK-NEXT:    fminnm d1, d1, d3
+; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i16> @llvm.fptoui.sat.v2f64.v2i16(<2 x double> %f)
+    ret <2 x i16> %x
+}
+
+define <2 x i19> @test_unsigned_v2f64_v2i19(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i19:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    mov x8, #281457796841472
+; CHECK-NEXT:    movk x8, #16671, lsl #48
+; CHECK-NEXT:    mov d2, v0.d[1]
+; CHECK-NEXT:    fmaxnm d0, d0, d1
+; CHECK-NEXT:    fmov d3, x8
+; CHECK-NEXT:    fmaxnm d1, d2, d1
+; CHECK-NEXT:    fminnm d0, d0, d3
+; CHECK-NEXT:    fminnm d1, d1, d3
+; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i19> @llvm.fptoui.sat.v2f64.v2i19(<2 x double> %f)
+    ret <2 x i19> %x
+}
+
+define <2 x i32> @test_unsigned_v2f64_v2i32_duplicate(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i32_duplicate:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov d1, v0.d[1]
+; CHECK-NEXT:    fcvtzu w8, d0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w8, d1
+; CHECK-NEXT:    mov v0.s[1], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <2 x i32> @llvm.fptoui.sat.v2f64.v2i32(<2 x double> %f)
+    ret <2 x i32> %x
+}
+
+define <2 x i50> @test_unsigned_v2f64_v2i50(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i50:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    mov x8, #-8
+; CHECK-NEXT:    movk x8, #17167, lsl #48
+; CHECK-NEXT:    mov d2, v0.d[1]
+; CHECK-NEXT:    fmaxnm d0, d0, d1
+; CHECK-NEXT:    fmov d3, x8
+; CHECK-NEXT:    fmaxnm d1, d2, d1
+; CHECK-NEXT:    fminnm d0, d0, d3
+; CHECK-NEXT:    fminnm d1, d1, d3
+; CHECK-NEXT:    fcvtzu x8, d0
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    fcvtzu x8, d1
+; CHECK-NEXT:    mov v0.d[1], x8
+; CHECK-NEXT:    ret
+    %x = call <2 x i50> @llvm.fptoui.sat.v2f64.v2i50(<2 x double> %f)
+    ret <2 x i50> %x
+}
+
+define <2 x i64> @test_unsigned_v2f64_v2i64(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fcvtzu v0.2d, v0.2d
+; CHECK-NEXT:    ret
+    %x = call <2 x i64> @llvm.fptoui.sat.v2f64.v2i64(<2 x double> %f)
+    ret <2 x i64> %x
+}
+
+define <2 x i100> @test_unsigned_v2f64_v2i100(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i100:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #64
+; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x30, x21, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 64
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w30, -32
+; CHECK-NEXT:    .cfi_offset b8, -40
+; CHECK-NEXT:    .cfi_offset b9, -48
+; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov d0, d8
+; CHECK-NEXT:    bl __fixunsdfti
+; CHECK-NEXT:    mov x8, #5057542381537067007
+; CHECK-NEXT:    fcmp d8, #0.0
+; CHECK-NEXT:    mov x21, #68719476735
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fmov d9, x8
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp d8, d9
+; CHECK-NEXT:    csel x19, x21, x9, gt
+; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    bl __fixunsdfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x20
+; CHECK-NEXT:    mov x3, x19
+; CHECK-NEXT:    ldp x20, x19, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp d0, #0.0
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp d0, d9
+; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csel x1, x21, x9, gt
+; CHECK-NEXT:    ldp x30, x21, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #64
+; CHECK-NEXT:    ret
+    %x = call <2 x i100> @llvm.fptoui.sat.v2f64.v2i100(<2 x double> %f)
+    ret <2 x i100> %x
+}
+
+define <2 x i128> @test_unsigned_v2f64_v2i128(<2 x double> %f) {
+; CHECK-LABEL: test_unsigned_v2f64_v2i128:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #64
+; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    str x30, [sp, #32] // 8-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 64
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w30, -32
+; CHECK-NEXT:    .cfi_offset b8, -40
+; CHECK-NEXT:    .cfi_offset b9, -48
+; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    fmov d0, d8
+; CHECK-NEXT:    bl __fixunsdfti
+; CHECK-NEXT:    mov x8, #5183643171103440895
+; CHECK-NEXT:    fcmp d8, #0.0
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    fmov d9, x8
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp d8, d9
+; CHECK-NEXT:    csinv x19, x9, xzr, le
+; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    bl __fixunsdfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov x2, x19
+; CHECK-NEXT:    mov x3, x20
+; CHECK-NEXT:    ldr x30, [sp, #32] // 8-byte Folded Reload
 ; CHECK-NEXT:    ldp x20, x19, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp d0, #0.0
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, xzr, x1, lt
-; CHECK-NEXT:    fcmp d0, d9
-; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp d0, d9
+; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csinv x1, x9, xzr, le
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    fmov x0, d0
+; CHECK-NEXT:    add sp, sp, #64
+; CHECK-NEXT:    ret
+    %x = call <2 x i128> @llvm.fptoui.sat.v2f64.v2i128(<2 x double> %f)
+    ret <2 x i128> %x
+}
+
+;
+; 4-Vector half to unsigned integer -- result size variation
+;
+
+declare <4 x   i1> @llvm.fptoui.sat.v4f16.v4i1  (<4 x half>)
+declare <4 x   i8> @llvm.fptoui.sat.v4f16.v4i8  (<4 x half>)
+declare <4 x  i13> @llvm.fptoui.sat.v4f16.v4i13 (<4 x half>)
+declare <4 x  i16> @llvm.fptoui.sat.v4f16.v4i16 (<4 x half>)
+declare <4 x  i19> @llvm.fptoui.sat.v4f16.v4i19 (<4 x half>)
+declare <4 x  i50> @llvm.fptoui.sat.v4f16.v4i50 (<4 x half>)
+declare <4 x  i64> @llvm.fptoui.sat.v4f16.v4i64 (<4 x half>)
+declare <4 x i100> @llvm.fptoui.sat.v4f16.v4i100(<4 x half>)
+declare <4 x i128> @llvm.fptoui.sat.v4f16.v4i128(<4 x half>)
+
+define <4 x i1> @test_unsigned_v4f16_v4i1(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    fcvt s2, h0
+; CHECK-NEXT:    mov h3, v0.h[1]
+; CHECK-NEXT:    mov h5, v0.h[2]
+; CHECK-NEXT:    fmov s4, #1.00000000
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    fcvt s5, h5
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fmaxnm s3, s3, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    fminnm s2, s3, s4
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fminnm s2, s5, s4
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <4 x i1> @llvm.fptoui.sat.v4f16.v4i1(<4 x half> %f)
+    ret <4 x i1> %x
+}
+
+define <4 x i8> @test_unsigned_v4f16_v4i8(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i8:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    fcvt s2, h0
+; CHECK-NEXT:    mov h3, v0.h[1]
+; CHECK-NEXT:    mov w8, #1132396544
+; CHECK-NEXT:    mov h5, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    fcvt s5, h5
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fmaxnm s3, s3, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    fminnm s2, s3, s4
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fminnm s2, s5, s4
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <4 x i8> @llvm.fptoui.sat.v4f16.v4i8(<4 x half> %f)
+    ret <4 x i8> %x
+}
+
+define <4 x i13> @test_unsigned_v4f16_v4i13(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i13:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    fcvt s2, h0
+; CHECK-NEXT:    mov h3, v0.h[1]
+; CHECK-NEXT:    mov w8, #63488
+; CHECK-NEXT:    movk w8, #17919, lsl #16
+; CHECK-NEXT:    mov h5, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fcvt s5, h5
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fmaxnm s3, s3, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    fminnm s2, s3, s4
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fminnm s2, s5, s4
+; CHECK-NEXT:    mov v0.h[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.h[3], w8
+; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    ret
+    %x = call <4 x i13> @llvm.fptoui.sat.v4f16.v4i13(<4 x half> %f)
+    ret <4 x i13> %x
+}
+
+define <4 x i16> @test_unsigned_v4f16_v4i16(<4 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v4f16_v4i16:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    movi d1, #0000000000000000
+; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    mov w8, #65280
+; CHECK-CVT-NEXT:    movk w8, #18303, lsl #16
+; CHECK-CVT-NEXT:    fmaxnm s2, s0, s1
+; CHECK-CVT-NEXT:    mov s3, v0.s[1]
+; CHECK-CVT-NEXT:    fmov s4, w8
+; CHECK-CVT-NEXT:    mov s5, v0.s[2]
+; CHECK-CVT-NEXT:    fminnm s2, s2, s4
+; CHECK-CVT-NEXT:    fmaxnm s3, s3, s1
+; CHECK-CVT-NEXT:    fmaxnm s5, s5, s1
+; CHECK-CVT-NEXT:    fcvtzu w8, s2
+; CHECK-CVT-NEXT:    fminnm s2, s3, s4
+; CHECK-CVT-NEXT:    mov s3, v0.s[3]
+; CHECK-CVT-NEXT:    fmov s0, w8
+; CHECK-CVT-NEXT:    fcvtzu w9, s2
+; CHECK-CVT-NEXT:    fminnm s2, s5, s4
+; CHECK-CVT-NEXT:    fmaxnm s1, s3, s1
+; CHECK-CVT-NEXT:    mov v0.h[1], w9
+; CHECK-CVT-NEXT:    fcvtzu w8, s2
+; CHECK-CVT-NEXT:    fminnm s1, s1, s4
+; CHECK-CVT-NEXT:    mov v0.h[2], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s1
+; CHECK-CVT-NEXT:    mov v0.h[3], w8
+; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_unsigned_v4f16_v4i16:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    fcvtzu v0.4h, v0.4h
+; CHECK-FP16-NEXT:    ret
+    %x = call <4 x i16> @llvm.fptoui.sat.v4f16.v4i16(<4 x half> %f)
+    ret <4 x i16> %x
+}
+
+define <4 x i19> @test_unsigned_v4f16_v4i19(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i19:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    movi d1, #0000000000000000
+; CHECK-NEXT:    fcvt s2, h0
+; CHECK-NEXT:    mov h3, v0.h[1]
+; CHECK-NEXT:    mov w8, #65504
+; CHECK-NEXT:    movk w8, #18687, lsl #16
+; CHECK-NEXT:    mov h5, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fcvt s5, h5
+; CHECK-NEXT:    fminnm s2, s2, s4
+; CHECK-NEXT:    fmaxnm s3, s3, s1
+; CHECK-NEXT:    fmaxnm s5, s5, s1
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    fminnm s2, s3, s4
+; CHECK-NEXT:    fcvt s3, h0
+; CHECK-NEXT:    fmov s0, w8
+; CHECK-NEXT:    fcvtzu w9, s2
+; CHECK-NEXT:    fmaxnm s1, s3, s1
+; CHECK-NEXT:    fminnm s2, s5, s4
+; CHECK-NEXT:    mov v0.s[1], w9
+; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    fcvtzu w8, s2
+; CHECK-NEXT:    mov v0.s[2], w8
+; CHECK-NEXT:    fcvtzu w8, s1
+; CHECK-NEXT:    mov v0.s[3], w8
+; CHECK-NEXT:    ret
+    %x = call <4 x i19> @llvm.fptoui.sat.v4f16.v4i19(<4 x half> %f)
+    ret <4 x i19> %x
+}
+
+define <4 x i32> @test_unsigned_v4f16_v4i32_duplicate(<4 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v4f16_v4i32_duplicate:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    fcvtzu v0.4s, v0.4s
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_unsigned_v4f16_v4i32_duplicate:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-FP16-NEXT:    mov h2, v0.h[1]
+; CHECK-FP16-NEXT:    fcvtzu w8, h0
+; CHECK-FP16-NEXT:    fmov s1, w8
+; CHECK-FP16-NEXT:    fcvtzu w8, h2
+; CHECK-FP16-NEXT:    mov h2, v0.h[2]
+; CHECK-FP16-NEXT:    mov h0, v0.h[3]
+; CHECK-FP16-NEXT:    mov v1.s[1], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, h2
+; CHECK-FP16-NEXT:    mov v1.s[2], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, h0
+; CHECK-FP16-NEXT:    mov v1.s[3], w8
+; CHECK-FP16-NEXT:    mov v0.16b, v1.16b
+; CHECK-FP16-NEXT:    ret
+    %x = call <4 x i32> @llvm.fptoui.sat.v4f16.v4i32(<4 x half> %f)
+    ret <4 x i32> %x
+}
+
+define <4 x i50> @test_unsigned_v4f16_v4i50(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i50:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    fcvt s1, h0
+; CHECK-NEXT:    mov w8, #1484783615
+; CHECK-NEXT:    mov h2, v0.h[1]
+; CHECK-NEXT:    fmov s3, w8
+; CHECK-NEXT:    fcvtzu x9, s1
+; CHECK-NEXT:    fcmp s1, #0.0
+; CHECK-NEXT:    fcvt s2, h2
+; CHECK-NEXT:    csel x8, xzr, x9, lt
+; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    mov h1, v0.h[2]
+; CHECK-NEXT:    mov x9, #1125899906842623
+; CHECK-NEXT:    fcvtzu x10, s2
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x0, x9, x8, gt
+; CHECK-NEXT:    fcmp s2, #0.0
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s2, s3
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    fcvtzu x10, s1
+; CHECK-NEXT:    csel x1, x9, x8, gt
+; CHECK-NEXT:    fcmp s1, #0.0
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    csel x2, x9, x8, gt
+; CHECK-NEXT:    fcvtzu x8, s0
+; CHECK-NEXT:    fcmp s0, #0.0
+; CHECK-NEXT:    csel x8, xzr, x8, lt
+; CHECK-NEXT:    fcmp s0, s3
+; CHECK-NEXT:    csel x3, x9, x8, gt
+; CHECK-NEXT:    ret
+    %x = call <4 x i50> @llvm.fptoui.sat.v4f16.v4i50(<4 x half> %f)
+    ret <4 x i50> %x
+}
+
+define <4 x i64> @test_unsigned_v4f16_v4i64(<4 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v4f16_v4i64:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-CVT-NEXT:    mov h1, v0.h[2]
+; CHECK-CVT-NEXT:    mov h2, v0.h[1]
+; CHECK-CVT-NEXT:    fcvt s3, h0
+; CHECK-CVT-NEXT:    mov h0, v0.h[3]
+; CHECK-CVT-NEXT:    fcvt s1, h1
+; CHECK-CVT-NEXT:    fcvt s2, h2
+; CHECK-CVT-NEXT:    fcvtzu x8, s3
+; CHECK-CVT-NEXT:    fcvt s3, h0
+; CHECK-CVT-NEXT:    fcvtzu x9, s1
+; CHECK-CVT-NEXT:    fmov d0, x8
+; CHECK-CVT-NEXT:    fcvtzu x8, s2
+; CHECK-CVT-NEXT:    fmov d1, x9
+; CHECK-CVT-NEXT:    fcvtzu x9, s3
+; CHECK-CVT-NEXT:    mov v0.d[1], x8
+; CHECK-CVT-NEXT:    mov v1.d[1], x9
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_unsigned_v4f16_v4i64:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-FP16-NEXT:    mov h1, v0.h[2]
+; CHECK-FP16-NEXT:    mov h2, v0.h[1]
+; CHECK-FP16-NEXT:    mov h3, v0.h[3]
+; CHECK-FP16-NEXT:    fcvtzu x8, h0
+; CHECK-FP16-NEXT:    fcvtzu x9, h1
+; CHECK-FP16-NEXT:    fmov d0, x8
+; CHECK-FP16-NEXT:    fcvtzu x8, h2
+; CHECK-FP16-NEXT:    fmov d1, x9
+; CHECK-FP16-NEXT:    fcvtzu x9, h3
+; CHECK-FP16-NEXT:    mov v0.d[1], x8
+; CHECK-FP16-NEXT:    mov v1.d[1], x9
+; CHECK-FP16-NEXT:    ret
+    %x = call <4 x i64> @llvm.fptoui.sat.v4f16.v4i64(<4 x half> %f)
+    ret <4 x i64> %x
+}
+
+define <4 x i100> @test_unsigned_v4f16_v4i100(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i100:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    sub sp, sp, #96
+; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x30, x25, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 96
+; CHECK-NEXT:    .cfi_offset w19, -8
+; CHECK-NEXT:    .cfi_offset w20, -16
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w30, -64
+; CHECK-NEXT:    .cfi_offset b8, -72
+; CHECK-NEXT:    .cfi_offset b9, -80
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[2]
+; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov w8, #1904214015
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov x25, #68719476735
+; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x19, x25, x9, gt
+; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x21, x25, x9, gt
+; CHECK-NEXT:    csinv x22, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csel x23, x25, x9, gt
+; CHECK-NEXT:    csinv x24, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov x2, x22
+; CHECK-NEXT:    mov x3, x21
+; CHECK-NEXT:    mov x4, x20
+; CHECK-NEXT:    mov x5, x19
+; CHECK-NEXT:    mov x6, x24
+; CHECK-NEXT:    csel x8, xzr, x0, lt
+; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    mov x7, x23
+; CHECK-NEXT:    ldp x20, x19, [sp, #80] // 16-byte Folded Reload
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
-; CHECK-NEXT:    csel x1, x21, x9, gt
-; CHECK-NEXT:    ldp x30, x21, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x1, x25, x9, gt
+; CHECK-NEXT:    ldp x22, x21, [sp, #64] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    ldp x24, x23, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    ldp x30, x25, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #64
+; CHECK-NEXT:    add sp, sp, #96
 ; CHECK-NEXT:    ret
-    %x = call <2 x i100> @llvm.fptoui.sat.v2f64.v2i100(<2 x double> %f)
-    ret <2 x i100> %x
+    %x = call <4 x i100> @llvm.fptoui.sat.v4f16.v4i100(<4 x half> %f)
+    ret <4 x i100> %x
 }
 
-define <2 x i128> @test_unsigned_v2f64_v2i128(<2 x double> %f) {
-; CHECK-LABEL: test_unsigned_v2f64_v2i128:
+define <4 x i128> @test_unsigned_v4f16_v4i128(<4 x half> %f) {
+; CHECK-LABEL: test_unsigned_v4f16_v4i128:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #64
+; CHECK-NEXT:    sub sp, sp, #96
 ; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
 ; CHECK-NEXT:    str x30, [sp, #32] // 8-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 64
+; CHECK-NEXT:    stp x24, x23, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 96
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
-; CHECK-NEXT:    .cfi_offset w30, -32
-; CHECK-NEXT:    .cfi_offset b8, -40
-; CHECK-NEXT:    .cfi_offset b9, -48
-; CHECK-NEXT:    mov d8, v0.d[1]
+; CHECK-NEXT:    .cfi_offset w21, -24
+; CHECK-NEXT:    .cfi_offset w22, -32
+; CHECK-NEXT:    .cfi_offset w23, -40
+; CHECK-NEXT:    .cfi_offset w24, -48
+; CHECK-NEXT:    .cfi_offset w30, -64
+; CHECK-NEXT:    .cfi_offset b8, -72
+; CHECK-NEXT:    .cfi_offset b9, -80
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov h1, v0.h[1]
 ; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fmov d0, d8
-; CHECK-NEXT:    bl __fixunsdfti
-; CHECK-NEXT:    mov x8, #5183643171103440895
-; CHECK-NEXT:    fcmp d8, #0.0
+; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    fmov d9, x8
+; CHECK-NEXT:    mov w8, #2139095039
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    fmov s9, w8
 ; CHECK-NEXT:    csel x8, xzr, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
-; CHECK-NEXT:    fcmp d8, d9
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
 ; CHECK-NEXT:    csinv x19, x9, xzr, le
 ; CHECK-NEXT:    csinv x20, x8, xzr, le
-; CHECK-NEXT:    bl __fixunsdfti
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x21, x9, xzr, le
+; CHECK-NEXT:    csinv x22, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x23, x9, xzr, le
+; CHECK-NEXT:    csinv x24, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
 ; CHECK-NEXT:    mov x2, x19
 ; CHECK-NEXT:    mov x3, x20
-; CHECK-NEXT:    ldr x30, [sp, #32] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x20, x19, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT:    fcmp d0, #0.0
+; CHECK-NEXT:    mov x4, x21
+; CHECK-NEXT:    mov x5, x22
+; CHECK-NEXT:    mov x6, x23
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, xzr, x1, lt
-; CHECK-NEXT:    fcmp d0, d9
-; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    mov x7, x24
+; CHECK-NEXT:    ldp x20, x19, [sp, #80] // 16-byte Folded Reload
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    csinv x1, x9, xzr, le
+; CHECK-NEXT:    ldp x22, x21, [sp, #64] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    ldr x30, [sp, #32] // 8-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov v0.d[1], x1
+; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #64
+; CHECK-NEXT:    add sp, sp, #96
 ; CHECK-NEXT:    ret
-    %x = call <2 x i128> @llvm.fptoui.sat.v2f64.v2i128(<2 x double> %f)
-    ret <2 x i128> %x
+    %x = call <4 x i128> @llvm.fptoui.sat.v4f16.v4i128(<4 x half> %f)
+    ret <4 x i128> %x
 }
 
 ;
-; 4-Vector half to unsigned integer -- result size variation
+; 8-Vector half to unsigned integer -- result size variation
 ;
 
-declare <4 x   i1> @llvm.fptoui.sat.v4f16.v4i1  (<4 x half>)
-declare <4 x   i8> @llvm.fptoui.sat.v4f16.v4i8  (<4 x half>)
-declare <4 x  i13> @llvm.fptoui.sat.v4f16.v4i13 (<4 x half>)
-declare <4 x  i16> @llvm.fptoui.sat.v4f16.v4i16 (<4 x half>)
-declare <4 x  i19> @llvm.fptoui.sat.v4f16.v4i19 (<4 x half>)
-declare <4 x  i50> @llvm.fptoui.sat.v4f16.v4i50 (<4 x half>)
-declare <4 x  i64> @llvm.fptoui.sat.v4f16.v4i64 (<4 x half>)
-declare <4 x i100> @llvm.fptoui.sat.v4f16.v4i100(<4 x half>)
-declare <4 x i128> @llvm.fptoui.sat.v4f16.v4i128(<4 x half>)
-
-define <4 x i1> @test_unsigned_v4f16_v4i1(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i1:
+declare <8 x   i1> @llvm.fptoui.sat.v8f16.v8i1  (<8 x half>)
+declare <8 x   i8> @llvm.fptoui.sat.v8f16.v8i8  (<8 x half>)
+declare <8 x  i13> @llvm.fptoui.sat.v8f16.v8i13 (<8 x half>)
+declare <8 x  i16> @llvm.fptoui.sat.v8f16.v8i16 (<8 x half>)
+declare <8 x  i19> @llvm.fptoui.sat.v8f16.v8i19 (<8 x half>)
+declare <8 x  i50> @llvm.fptoui.sat.v8f16.v8i50 (<8 x half>)
+declare <8 x  i64> @llvm.fptoui.sat.v8f16.v8i64 (<8 x half>)
+declare <8 x i100> @llvm.fptoui.sat.v8f16.v8i100(<8 x half>)
+declare <8 x i128> @llvm.fptoui.sat.v8f16.v8i128(<8 x half>)
+
+define <8 x i1> @test_unsigned_v8f16_v8i1(<8 x half> %f) {
+; CHECK-LABEL: test_unsigned_v8f16_v8i1:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    fcvt s2, h0
-; CHECK-NEXT:    mov h3, v0.h[1]
-; CHECK-NEXT:    mov h5, v0.h[2]
-; CHECK-NEXT:    fmov s4, #1.00000000
-; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    fmaxnm s2, s2, s1
-; CHECK-NEXT:    fcvt s3, h3
-; CHECK-NEXT:    fcvt s5, h5
-; CHECK-NEXT:    fminnm s2, s2, s4
-; CHECK-NEXT:    fmaxnm s3, s3, s1
-; CHECK-NEXT:    fmaxnm s5, s5, s1
-; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    fminnm s2, s3, s4
+; CHECK-NEXT:    movi d2, #0000000000000000
+; CHECK-NEXT:    mov h1, v0.h[1]
 ; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w9, s2
-; CHECK-NEXT:    fmaxnm s1, s3, s1
-; CHECK-NEXT:    fminnm s2, s5, s4
-; CHECK-NEXT:    mov v0.h[1], w9
-; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov h4, v0.h[2]
+; CHECK-NEXT:    fmov s5, #1.00000000
+; CHECK-NEXT:    mov h6, v0.h[3]
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fmaxnm s3, s3, s2
+; CHECK-NEXT:    fcvt s4, h4
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fmaxnm s1, s1, s2
+; CHECK-NEXT:    fminnm s3, s3, s5
+; CHECK-NEXT:    fmaxnm s4, s4, s2
+; CHECK-NEXT:    fmaxnm s6, s6, s2
+; CHECK-NEXT:    fminnm s7, s1, s5
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov h3, v0.h[4]
+; CHECK-NEXT:    fminnm s4, s4, s5
+; CHECK-NEXT:    fminnm s6, s6, s5
+; CHECK-NEXT:    fmov s1, w8
+; CHECK-NEXT:    fcvtzu w8, s7
+; CHECK-NEXT:    mov h7, v0.h[5]
+; CHECK-NEXT:    fcvt s3, h3
+; CHECK-NEXT:    mov v1.b[1], w8
+; CHECK-NEXT:    fcvtzu w8, s4
+; CHECK-NEXT:    fcvt s4, h7
+; CHECK-NEXT:    fmaxnm s3, s3, s2
+; CHECK-NEXT:    mov h7, v0.h[6]
+; CHECK-NEXT:    mov h0, v0.h[7]
+; CHECK-NEXT:    mov v1.b[2], w8
+; CHECK-NEXT:    fcvtzu w8, s6
+; CHECK-NEXT:    fmaxnm s4, s4, s2
+; CHECK-NEXT:    fminnm s3, s3, s5
+; CHECK-NEXT:    fcvt s6, h7
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    mov v1.b[3], w8
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    fminnm s3, s4, s5
+; CHECK-NEXT:    fmaxnm s4, s6, s2
+; CHECK-NEXT:    fmaxnm s0, s0, s2
+; CHECK-NEXT:    mov v1.b[4], w8
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    fminnm s2, s4, s5
+; CHECK-NEXT:    fminnm s0, s0, s5
+; CHECK-NEXT:    mov v1.b[5], w8
 ; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    mov v0.h[2], w8
-; CHECK-NEXT:    fcvtzu w8, s1
-; CHECK-NEXT:    mov v0.h[3], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    mov v1.b[6], w8
+; CHECK-NEXT:    fcvtzu w8, s0
+; CHECK-NEXT:    mov v1.b[7], w8
+; CHECK-NEXT:    fmov d0, d1
 ; CHECK-NEXT:    ret
-    %x = call <4 x i1> @llvm.fptoui.sat.v4f16.v4i1(<4 x half> %f)
-    ret <4 x i1> %x
+    %x = call <8 x i1> @llvm.fptoui.sat.v8f16.v8i1(<8 x half> %f)
+    ret <8 x i1> %x
 }
 
-define <4 x i8> @test_unsigned_v4f16_v4i8(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i8:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    fcvt s2, h0
-; CHECK-NEXT:    mov h3, v0.h[1]
-; CHECK-NEXT:    mov w8, #1132396544
-; CHECK-NEXT:    mov h5, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    fmaxnm s2, s2, s1
-; CHECK-NEXT:    fmov s4, w8
-; CHECK-NEXT:    fcvt s3, h3
-; CHECK-NEXT:    fcvt s5, h5
-; CHECK-NEXT:    fminnm s2, s2, s4
-; CHECK-NEXT:    fmaxnm s3, s3, s1
-; CHECK-NEXT:    fmaxnm s5, s5, s1
-; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    fminnm s2, s3, s4
-; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w9, s2
-; CHECK-NEXT:    fmaxnm s1, s3, s1
-; CHECK-NEXT:    fminnm s2, s5, s4
-; CHECK-NEXT:    mov v0.h[1], w9
-; CHECK-NEXT:    fminnm s1, s1, s4
-; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    mov v0.h[2], w8
-; CHECK-NEXT:    fcvtzu w8, s1
-; CHECK-NEXT:    mov v0.h[3], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
-; CHECK-NEXT:    ret
-    %x = call <4 x i8> @llvm.fptoui.sat.v4f16.v4i8(<4 x half> %f)
-    ret <4 x i8> %x
+define <8 x i8> @test_unsigned_v8f16_v8i8(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v8f16_v8i8:
+; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl v1.4s, v0.4h
+; CHECK-CVT-NEXT:    movi d2, #0000000000000000
+; CHECK-CVT-NEXT:    mov w8, #1132396544
+; CHECK-CVT-NEXT:    fcvtl2 v0.4s, v0.8h
+; CHECK-CVT-NEXT:    mov s3, v1.s[1]
+; CHECK-CVT-NEXT:    fmaxnm s4, s1, s2
+; CHECK-CVT-NEXT:    fmov s5, w8
+; CHECK-CVT-NEXT:    mov s6, v1.s[2]
+; CHECK-CVT-NEXT:    mov s7, v1.s[3]
+; CHECK-CVT-NEXT:    fmaxnm s3, s3, s2
+; CHECK-CVT-NEXT:    fminnm s4, s4, s5
+; CHECK-CVT-NEXT:    fmaxnm s6, s6, s2
+; CHECK-CVT-NEXT:    fminnm s3, s3, s5
+; CHECK-CVT-NEXT:    fcvtzu w8, s4
+; CHECK-CVT-NEXT:    fminnm s4, s6, s5
+; CHECK-CVT-NEXT:    mov s6, v0.s[1]
+; CHECK-CVT-NEXT:    fmov s1, w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fmaxnm s3, s7, s2
+; CHECK-CVT-NEXT:    mov v1.b[1], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s4
+; CHECK-CVT-NEXT:    fminnm s3, s3, s5
+; CHECK-CVT-NEXT:    fmaxnm s4, s0, s2
+; CHECK-CVT-NEXT:    mov v1.b[2], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fminnm s3, s4, s5
+; CHECK-CVT-NEXT:    fmaxnm s4, s6, s2
+; CHECK-CVT-NEXT:    mov s6, v0.s[2]
+; CHECK-CVT-NEXT:    mov s0, v0.s[3]
+; CHECK-CVT-NEXT:    mov v1.b[3], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fminnm s3, s4, s5
+; CHECK-CVT-NEXT:    fmaxnm s4, s6, s2
+; CHECK-CVT-NEXT:    fmaxnm s0, s0, s2
+; CHECK-CVT-NEXT:    mov v1.b[4], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fminnm s2, s4, s5
+; CHECK-CVT-NEXT:    fminnm s0, s0, s5
+; CHECK-CVT-NEXT:    mov v1.b[5], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s2
+; CHECK-CVT-NEXT:    mov v1.b[6], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s0
+; CHECK-CVT-NEXT:    mov v1.b[7], w8
+; CHECK-CVT-NEXT:    fmov d0, d1
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: test_unsigned_v8f16_v8i8:
+; CHECK-FP16:       // %bb.0:
+; CHECK-FP16-NEXT:    movi d2, #0000000000000000
+; CHECK-FP16-NEXT:    mov h1, v0.h[1]
+; CHECK-FP16-NEXT:    fcvt s3, h0
+; CHECK-FP16-NEXT:    mov w8, #1132396544
+; CHECK-FP16-NEXT:    mov h4, v0.h[2]
+; CHECK-FP16-NEXT:    mov h6, v0.h[3]
+; CHECK-FP16-NEXT:    fcvt s1, h1
+; CHECK-FP16-NEXT:    fmov s5, w8
+; CHECK-FP16-NEXT:    fmaxnm s3, s3, s2
+; CHECK-FP16-NEXT:    fcvt s4, h4
+; CHECK-FP16-NEXT:    fcvt s6, h6
+; CHECK-FP16-NEXT:    fmaxnm s1, s1, s2
+; CHECK-FP16-NEXT:    fminnm s3, s3, s5
+; CHECK-FP16-NEXT:    fmaxnm s4, s4, s2
+; CHECK-FP16-NEXT:    fmaxnm s6, s6, s2
+; CHECK-FP16-NEXT:    fminnm s7, s1, s5
+; CHECK-FP16-NEXT:    fcvtzu w8, s3
+; CHECK-FP16-NEXT:    mov h3, v0.h[4]
+; CHECK-FP16-NEXT:    fminnm s4, s4, s5
+; CHECK-FP16-NEXT:    fminnm s6, s6, s5
+; CHECK-FP16-NEXT:    fmov s1, w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s7
+; CHECK-FP16-NEXT:    mov h7, v0.h[5]
+; CHECK-FP16-NEXT:    fcvt s3, h3
+; CHECK-FP16-NEXT:    mov v1.b[1], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s4
+; CHECK-FP16-NEXT:    fcvt s4, h7
+; CHECK-FP16-NEXT:    fmaxnm s3, s3, s2
+; CHECK-FP16-NEXT:    mov h7, v0.h[6]
+; CHECK-FP16-NEXT:    mov h0, v0.h[7]
+; CHECK-FP16-NEXT:    mov v1.b[2], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s6
+; CHECK-FP16-NEXT:    fmaxnm s4, s4, s2
+; CHECK-FP16-NEXT:    fminnm s3, s3, s5
+; CHECK-FP16-NEXT:    fcvt s6, h7
+; CHECK-FP16-NEXT:    fcvt s0, h0
+; CHECK-FP16-NEXT:    mov v1.b[3], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s3
+; CHECK-FP16-NEXT:    fminnm s3, s4, s5
+; CHECK-FP16-NEXT:    fmaxnm s4, s6, s2
+; CHECK-FP16-NEXT:    fmaxnm s0, s0, s2
+; CHECK-FP16-NEXT:    mov v1.b[4], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s3
+; CHECK-FP16-NEXT:    fminnm s2, s4, s5
+; CHECK-FP16-NEXT:    fminnm s0, s0, s5
+; CHECK-FP16-NEXT:    mov v1.b[5], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s2
+; CHECK-FP16-NEXT:    mov v1.b[6], w8
+; CHECK-FP16-NEXT:    fcvtzu w8, s0
+; CHECK-FP16-NEXT:    mov v1.b[7], w8
+; CHECK-FP16-NEXT:    fmov d0, d1
+; CHECK-FP16-NEXT:    ret
+    %x = call <8 x i8> @llvm.fptoui.sat.v8f16.v8i8(<8 x half> %f)
+    ret <8 x i8> %x
 }
 
-define <4 x i13> @test_unsigned_v4f16_v4i13(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i13:
+define <8 x i13> @test_unsigned_v8f16_v8i13(<8 x half> %f) {
+; CHECK-LABEL: test_unsigned_v8f16_v8i13:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    fcvt s2, h0
-; CHECK-NEXT:    mov h3, v0.h[1]
+; CHECK-NEXT:    movi d2, #0000000000000000
+; CHECK-NEXT:    mov h1, v0.h[1]
+; CHECK-NEXT:    fcvt s3, h0
 ; CHECK-NEXT:    mov w8, #63488
 ; CHECK-NEXT:    movk w8, #17919, lsl #16
-; CHECK-NEXT:    mov h5, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    mov h4, v0.h[2]
+; CHECK-NEXT:    mov h6, v0.h[3]
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fmaxnm s3, s3, s2
+; CHECK-NEXT:    fmov s5, w8
+; CHECK-NEXT:    fcvt s4, h4
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fmaxnm s1, s1, s2
+; CHECK-NEXT:    fminnm s3, s3, s5
+; CHECK-NEXT:    fmaxnm s4, s4, s2
+; CHECK-NEXT:    fmaxnm s6, s6, s2
+; CHECK-NEXT:    fminnm s7, s1, s5
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    mov h3, v0.h[4]
+; CHECK-NEXT:    fminnm s4, s4, s5
+; CHECK-NEXT:    fminnm s6, s6, s5
+; CHECK-NEXT:    fmov s1, w8
+; CHECK-NEXT:    fcvtzu w8, s7
+; CHECK-NEXT:    mov h7, v0.h[5]
 ; CHECK-NEXT:    fcvt s3, h3
-; CHECK-NEXT:    fmov s4, w8
-; CHECK-NEXT:    fcvt s5, h5
-; CHECK-NEXT:    fminnm s2, s2, s4
-; CHECK-NEXT:    fmaxnm s3, s3, s1
-; CHECK-NEXT:    fmaxnm s5, s5, s1
-; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    fminnm s2, s3, s4
-; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w9, s2
-; CHECK-NEXT:    fmaxnm s1, s3, s1
-; CHECK-NEXT:    fminnm s2, s5, s4
-; CHECK-NEXT:    mov v0.h[1], w9
-; CHECK-NEXT:    fminnm s1, s1, s4
+; CHECK-NEXT:    mov v1.h[1], w8
+; CHECK-NEXT:    fcvtzu w8, s4
+; CHECK-NEXT:    fcvt s4, h7
+; CHECK-NEXT:    fmaxnm s3, s3, s2
+; CHECK-NEXT:    mov h7, v0.h[6]
+; CHECK-NEXT:    mov h0, v0.h[7]
+; CHECK-NEXT:    mov v1.h[2], w8
+; CHECK-NEXT:    fcvtzu w8, s6
+; CHECK-NEXT:    fmaxnm s4, s4, s2
+; CHECK-NEXT:    fminnm s3, s3, s5
+; CHECK-NEXT:    fcvt s6, h7
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    mov v1.h[3], w8
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    fminnm s3, s4, s5
+; CHECK-NEXT:    fmaxnm s4, s6, s2
+; CHECK-NEXT:    fmaxnm s0, s0, s2
+; CHECK-NEXT:    mov v1.h[4], w8
+; CHECK-NEXT:    fcvtzu w8, s3
+; CHECK-NEXT:    fminnm s2, s4, s5
+; CHECK-NEXT:    fminnm s0, s0, s5
+; CHECK-NEXT:    mov v1.h[5], w8
 ; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    mov v0.h[2], w8
-; CHECK-NEXT:    fcvtzu w8, s1
-; CHECK-NEXT:    mov v0.h[3], w8
-; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT:    mov v1.h[6], w8
+; CHECK-NEXT:    fcvtzu w8, s0
+; CHECK-NEXT:    mov v1.h[7], w8
+; CHECK-NEXT:    mov v0.16b, v1.16b
 ; CHECK-NEXT:    ret
-    %x = call <4 x i13> @llvm.fptoui.sat.v4f16.v4i13(<4 x half> %f)
-    ret <4 x i13> %x
+    %x = call <8 x i13> @llvm.fptoui.sat.v8f16.v8i13(<8 x half> %f)
+    ret <8 x i13> %x
 }
 
-define <4 x i16> @test_unsigned_v4f16_v4i16(<4 x half> %f) {
-; CHECK-CVT-LABEL: test_unsigned_v4f16_v4i16:
+define <8 x i16> @test_unsigned_v8f16_v8i16(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v8f16_v8i16:
 ; CHECK-CVT:       // %bb.0:
-; CHECK-CVT-NEXT:    movi d1, #0000000000000000
-; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    fcvtl v1.4s, v0.4h
+; CHECK-CVT-NEXT:    movi d2, #0000000000000000
 ; CHECK-CVT-NEXT:    mov w8, #65280
+; CHECK-CVT-NEXT:    fcvtl2 v0.4s, v0.8h
 ; CHECK-CVT-NEXT:    movk w8, #18303, lsl #16
-; CHECK-CVT-NEXT:    fmaxnm s2, s0, s1
-; CHECK-CVT-NEXT:    mov s3, v0.s[1]
-; CHECK-CVT-NEXT:    fmov s4, w8
-; CHECK-CVT-NEXT:    mov s5, v0.s[2]
-; CHECK-CVT-NEXT:    fminnm s2, s2, s4
-; CHECK-CVT-NEXT:    fmaxnm s3, s3, s1
-; CHECK-CVT-NEXT:    fmaxnm s5, s5, s1
-; CHECK-CVT-NEXT:    fcvtzu w8, s2
-; CHECK-CVT-NEXT:    fminnm s2, s3, s4
-; CHECK-CVT-NEXT:    mov s3, v0.s[3]
-; CHECK-CVT-NEXT:    fmov s0, w8
-; CHECK-CVT-NEXT:    fcvtzu w9, s2
-; CHECK-CVT-NEXT:    fminnm s2, s5, s4
-; CHECK-CVT-NEXT:    fmaxnm s1, s3, s1
-; CHECK-CVT-NEXT:    mov v0.h[1], w9
+; CHECK-CVT-NEXT:    mov s3, v1.s[1]
+; CHECK-CVT-NEXT:    fmaxnm s4, s1, s2
+; CHECK-CVT-NEXT:    fmov s5, w8
+; CHECK-CVT-NEXT:    mov s6, v1.s[2]
+; CHECK-CVT-NEXT:    mov s7, v1.s[3]
+; CHECK-CVT-NEXT:    fmaxnm s3, s3, s2
+; CHECK-CVT-NEXT:    fminnm s4, s4, s5
+; CHECK-CVT-NEXT:    fmaxnm s6, s6, s2
+; CHECK-CVT-NEXT:    fminnm s3, s3, s5
+; CHECK-CVT-NEXT:    fcvtzu w8, s4
+; CHECK-CVT-NEXT:    fminnm s4, s6, s5
+; CHECK-CVT-NEXT:    mov s6, v0.s[1]
+; CHECK-CVT-NEXT:    fmov s1, w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fmaxnm s3, s7, s2
+; CHECK-CVT-NEXT:    mov v1.h[1], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s4
+; CHECK-CVT-NEXT:    fminnm s3, s3, s5
+; CHECK-CVT-NEXT:    fmaxnm s4, s0, s2
+; CHECK-CVT-NEXT:    mov v1.h[2], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fminnm s3, s4, s5
+; CHECK-CVT-NEXT:    fmaxnm s4, s6, s2
+; CHECK-CVT-NEXT:    mov s6, v0.s[2]
+; CHECK-CVT-NEXT:    mov s0, v0.s[3]
+; CHECK-CVT-NEXT:    mov v1.h[3], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fminnm s3, s4, s5
+; CHECK-CVT-NEXT:    fmaxnm s4, s6, s2
+; CHECK-CVT-NEXT:    fmaxnm s0, s0, s2
+; CHECK-CVT-NEXT:    mov v1.h[4], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s3
+; CHECK-CVT-NEXT:    fminnm s2, s4, s5
+; CHECK-CVT-NEXT:    fminnm s0, s0, s5
+; CHECK-CVT-NEXT:    mov v1.h[5], w8
 ; CHECK-CVT-NEXT:    fcvtzu w8, s2
-; CHECK-CVT-NEXT:    fminnm s1, s1, s4
-; CHECK-CVT-NEXT:    mov v0.h[2], w8
-; CHECK-CVT-NEXT:    fcvtzu w8, s1
-; CHECK-CVT-NEXT:    mov v0.h[3], w8
-; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-CVT-NEXT:    mov v1.h[6], w8
+; CHECK-CVT-NEXT:    fcvtzu w8, s0
+; CHECK-CVT-NEXT:    mov v1.h[7], w8
+; CHECK-CVT-NEXT:    mov v0.16b, v1.16b
 ; CHECK-CVT-NEXT:    ret
 ;
-; CHECK-FP16-LABEL: test_unsigned_v4f16_v4i16:
+; CHECK-FP16-LABEL: test_unsigned_v8f16_v8i16:
 ; CHECK-FP16:       // %bb.0:
-; CHECK-FP16-NEXT:    fcvtzu v0.4h, v0.4h
+; CHECK-FP16-NEXT:    fcvtzu v0.8h, v0.8h
 ; CHECK-FP16-NEXT:    ret
-    %x = call <4 x i16> @llvm.fptoui.sat.v4f16.v4i16(<4 x half> %f)
-    ret <4 x i16> %x
+    %x = call <8 x i16> @llvm.fptoui.sat.v8f16.v8i16(<8 x half> %f)
+    ret <8 x i16> %x
 }
 
-define <4 x i19> @test_unsigned_v4f16_v4i19(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i19:
+define <8 x i19> @test_unsigned_v8f16_v8i19(<8 x half> %f) {
+; CHECK-LABEL: test_unsigned_v8f16_v8i19:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    fcvt s2, h0
-; CHECK-NEXT:    mov h3, v0.h[1]
+; CHECK-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
 ; CHECK-NEXT:    mov w8, #65504
+; CHECK-NEXT:    mov h3, v0.h[1]
 ; CHECK-NEXT:    movk w8, #18687, lsl #16
-; CHECK-NEXT:    mov h5, v0.h[2]
-; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    fmaxnm s2, s2, s1
+; CHECK-NEXT:    mov h4, v0.h[2]
+; CHECK-NEXT:    mov h5, v0.h[3]
+; CHECK-NEXT:    movi d2, #0000000000000000
+; CHECK-NEXT:    fcvt s0, h0
+; CHECK-NEXT:    mov h6, v1.h[1]
+; CHECK-NEXT:    mov h7, v1.h[2]
+; CHECK-NEXT:    mov h16, v1.h[3]
 ; CHECK-NEXT:    fcvt s3, h3
-; CHECK-NEXT:    fmov s4, w8
+; CHECK-NEXT:    fcvt s4, h4
 ; CHECK-NEXT:    fcvt s5, h5
-; CHECK-NEXT:    fminnm s2, s2, s4
-; CHECK-NEXT:    fmaxnm s3, s3, s1
-; CHECK-NEXT:    fmaxnm s5, s5, s1
-; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    fminnm s2, s3, s4
-; CHECK-NEXT:    fcvt s3, h0
-; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    fcvtzu w9, s2
-; CHECK-NEXT:    fmaxnm s1, s3, s1
-; CHECK-NEXT:    fminnm s2, s5, s4
-; CHECK-NEXT:    mov v0.s[1], w9
-; CHECK-NEXT:    fminnm s1, s1, s4
-; CHECK-NEXT:    fcvtzu w8, s2
-; CHECK-NEXT:    mov v0.s[2], w8
-; CHECK-NEXT:    fcvtzu w8, s1
-; CHECK-NEXT:    mov v0.s[3], w8
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fmaxnm s0, s0, s2
+; CHECK-NEXT:    fcvt s6, h6
+; CHECK-NEXT:    fcvt s7, h7
+; CHECK-NEXT:    fcvt s16, h16
+; CHECK-NEXT:    fmaxnm s3, s3, s2
+; CHECK-NEXT:    fmaxnm s4, s4, s2
+; CHECK-NEXT:    fmaxnm s5, s5, s2
+; CHECK-NEXT:    fmaxnm s1, s1, s2
+; CHECK-NEXT:    fmov s17, w8
+; CHECK-NEXT:    fmaxnm s6, s6, s2
+; CHECK-NEXT:    fmaxnm s7, s7, s2
+; CHECK-NEXT:    fmaxnm s2, s16, s2
+; CHECK-NEXT:    fminnm s0, s0, s17
+; CHECK-NEXT:    fminnm s3, s3, s17
+; CHECK-NEXT:    fminnm s4, s4, s17
+; CHECK-NEXT:    fminnm s5, s5, s17
+; CHECK-NEXT:    fminnm s1, s1, s17
+; CHECK-NEXT:    fminnm s6, s6, s17
+; CHECK-NEXT:    fminnm s7, s7, s17
+; CHECK-NEXT:    fminnm s2, s2, s17
+; CHECK-NEXT:    fcvtzu w0, s0
+; CHECK-NEXT:    fcvtzu w1, s3
+; CHECK-NEXT:    fcvtzu w2, s4
+; CHECK-NEXT:    fcvtzu w3, s5
+; CHECK-NEXT:    fcvtzu w4, s1
+; CHECK-NEXT:    fcvtzu w5, s6
+; CHECK-NEXT:    fcvtzu w6, s7
+; CHECK-NEXT:    fcvtzu w7, s2
 ; CHECK-NEXT:    ret
-    %x = call <4 x i19> @llvm.fptoui.sat.v4f16.v4i19(<4 x half> %f)
-    ret <4 x i19> %x
+    %x = call <8 x i19> @llvm.fptoui.sat.v8f16.v8i19(<8 x half> %f)
+    ret <8 x i19> %x
 }
 
-define <4 x i32> @test_unsigned_v4f16_v4i32_duplicate(<4 x half> %f) {
-; CHECK-CVT-LABEL: test_unsigned_v4f16_v4i32_duplicate:
+define <8 x i32> @test_unsigned_v8f16_v8i32_duplicate(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v8f16_v8i32_duplicate:
 ; CHECK-CVT:       // %bb.0:
+; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-CVT-NEXT:    fcvtzu v1.4s, v1.4s
 ; CHECK-CVT-NEXT:    fcvtzu v0.4s, v0.4s
 ; CHECK-CVT-NEXT:    ret
 ;
-; CHECK-FP16-LABEL: test_unsigned_v4f16_v4i32_duplicate:
+; CHECK-FP16-LABEL: test_unsigned_v8f16_v8i32_duplicate:
 ; CHECK-FP16:       // %bb.0:
-; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-FP16-NEXT:    mov h2, v0.h[1]
-; CHECK-FP16-NEXT:    fcvtzu w8, h0
+; CHECK-FP16-NEXT:    ext v3.16b, v0.16b, v0.16b, #8
+; CHECK-FP16-NEXT:    mov h4, v0.h[1]
+; CHECK-FP16-NEXT:    fcvtzu w9, h0
+; CHECK-FP16-NEXT:    mov h2, v3.h[1]
+; CHECK-FP16-NEXT:    fcvtzu w8, h3
+; CHECK-FP16-NEXT:    mov h5, v3.h[2]
+; CHECK-FP16-NEXT:    mov h3, v3.h[3]
 ; CHECK-FP16-NEXT:    fmov s1, w8
 ; CHECK-FP16-NEXT:    fcvtzu w8, h2
-; CHECK-FP16-NEXT:    mov h2, v0.h[2]
+; CHECK-FP16-NEXT:    fmov s2, w9
+; CHECK-FP16-NEXT:    fcvtzu w9, h4
+; CHECK-FP16-NEXT:    mov h4, v0.h[2]
 ; CHECK-FP16-NEXT:    mov h0, v0.h[3]
 ; CHECK-FP16-NEXT:    mov v1.s[1], w8
-; CHECK-FP16-NEXT:    fcvtzu w8, h2
+; CHECK-FP16-NEXT:    fcvtzu w8, h5
+; CHECK-FP16-NEXT:    mov v2.s[1], w9
+; CHECK-FP16-NEXT:    fcvtzu w9, h4
 ; CHECK-FP16-NEXT:    mov v1.s[2], w8
-; CHECK-FP16-NEXT:    fcvtzu w8, h0
+; CHECK-FP16-NEXT:    fcvtzu w8, h3
+; CHECK-FP16-NEXT:    mov v2.s[2], w9
+; CHECK-FP16-NEXT:    fcvtzu w9, h0
 ; CHECK-FP16-NEXT:    mov v1.s[3], w8
-; CHECK-FP16-NEXT:    mov v0.16b, v1.16b
+; CHECK-FP16-NEXT:    mov v2.s[3], w9
+; CHECK-FP16-NEXT:    mov v0.16b, v2.16b
 ; CHECK-FP16-NEXT:    ret
-    %x = call <4 x i32> @llvm.fptoui.sat.v4f16.v4i32(<4 x half> %f)
-    ret <4 x i32> %x
+    %x = call <8 x i32> @llvm.fptoui.sat.v8f16.v8i32(<8 x half> %f)
+    ret <8 x i32> %x
 }
 
-define <4 x i50> @test_unsigned_v4f16_v4i50(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i50:
+define <8 x i50> @test_unsigned_v8f16_v8i50(<8 x half> %f) {
+; CHECK-LABEL: test_unsigned_v8f16_v8i50:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
 ; CHECK-NEXT:    fcvt s1, h0
-; CHECK-NEXT:    mov w8, #1484783615
+; CHECK-NEXT:    mov w8, #1484783615
+; CHECK-NEXT:    mov h2, v0.h[1]
+; CHECK-NEXT:    mov x9, #1125899906842623
+; CHECK-NEXT:    fmov s3, w8
+; CHECK-NEXT:    fcvtzu x8, s1
+; CHECK-NEXT:    fcmp s1, #0.0
+; CHECK-NEXT:    fcvt s2, h2
+; CHECK-NEXT:    csel x8, xzr, x8, lt
+; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    mov h1, v0.h[2]
+; CHECK-NEXT:    fcvtzu x10, s2
+; CHECK-NEXT:    csel x0, x9, x8, gt
+; CHECK-NEXT:    fcmp s2, #0.0
+; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s2, s3
+; CHECK-NEXT:    mov h2, v0.h[3]
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    fcvtzu x10, s1
+; CHECK-NEXT:    csel x1, x9, x8, gt
+; CHECK-NEXT:    fcmp s1, #0.0
+; CHECK-NEXT:    fcvt s2, h2
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s1, s3
+; CHECK-NEXT:    fcvt s1, h0
+; CHECK-NEXT:    fcvtzu x10, s2
+; CHECK-NEXT:    csel x2, x9, x8, gt
+; CHECK-NEXT:    fcmp s2, #0.0
+; CHECK-NEXT:    csel x8, xzr, x10, lt
+; CHECK-NEXT:    fcmp s2, s3
 ; CHECK-NEXT:    mov h2, v0.h[1]
-; CHECK-NEXT:    fmov s3, w8
-; CHECK-NEXT:    fcvtzu x9, s1
+; CHECK-NEXT:    fcvtzu x10, s1
+; CHECK-NEXT:    csel x3, x9, x8, gt
 ; CHECK-NEXT:    fcmp s1, #0.0
 ; CHECK-NEXT:    fcvt s2, h2
-; CHECK-NEXT:    csel x8, xzr, x9, lt
+; CHECK-NEXT:    csel x8, xzr, x10, lt
 ; CHECK-NEXT:    fcmp s1, s3
 ; CHECK-NEXT:    mov h1, v0.h[2]
-; CHECK-NEXT:    mov x9, #1125899906842623
-; CHECK-NEXT:    fcvtzu x10, s2
 ; CHECK-NEXT:    mov h0, v0.h[3]
-; CHECK-NEXT:    csel x0, x9, x8, gt
+; CHECK-NEXT:    fcvtzu x10, s2
+; CHECK-NEXT:    csel x4, x9, x8, gt
 ; CHECK-NEXT:    fcmp s2, #0.0
 ; CHECK-NEXT:    fcvt s1, h1
+; CHECK-NEXT:    fcvt s0, h0
 ; CHECK-NEXT:    csel x8, xzr, x10, lt
 ; CHECK-NEXT:    fcmp s2, s3
-; CHECK-NEXT:    fcvt s0, h0
 ; CHECK-NEXT:    fcvtzu x10, s1
-; CHECK-NEXT:    csel x1, x9, x8, gt
+; CHECK-NEXT:    csel x5, x9, x8, gt
 ; CHECK-NEXT:    fcmp s1, #0.0
 ; CHECK-NEXT:    csel x8, xzr, x10, lt
 ; CHECK-NEXT:    fcmp s1, s3
-; CHECK-NEXT:    csel x2, x9, x8, gt
-; CHECK-NEXT:    fcvtzu x8, s0
+; CHECK-NEXT:    fcvtzu x10, s0
+; CHECK-NEXT:    csel x6, x9, x8, gt
 ; CHECK-NEXT:    fcmp s0, #0.0
-; CHECK-NEXT:    csel x8, xzr, x8, lt
+; CHECK-NEXT:    csel x8, xzr, x10, lt
 ; CHECK-NEXT:    fcmp s0, s3
-; CHECK-NEXT:    csel x3, x9, x8, gt
+; CHECK-NEXT:    csel x7, x9, x8, gt
 ; CHECK-NEXT:    ret
-    %x = call <4 x i50> @llvm.fptoui.sat.v4f16.v4i50(<4 x half> %f)
-    ret <4 x i50> %x
+    %x = call <8 x i50> @llvm.fptoui.sat.v8f16.v8i50(<8 x half> %f)
+    ret <8 x i50> %x
 }
 
-define <4 x i64> @test_unsigned_v4f16_v4i64(<4 x half> %f) {
-; CHECK-CVT-LABEL: test_unsigned_v4f16_v4i64:
+define <8 x i64> @test_unsigned_v8f16_v8i64(<8 x half> %f) {
+; CHECK-CVT-LABEL: test_unsigned_v8f16_v8i64:
 ; CHECK-CVT:       // %bb.0:
-; CHECK-CVT-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-CVT-NEXT:    mov h1, v0.h[2]
-; CHECK-CVT-NEXT:    mov h2, v0.h[1]
-; CHECK-CVT-NEXT:    fcvt s3, h0
-; CHECK-CVT-NEXT:    mov h0, v0.h[3]
-; CHECK-CVT-NEXT:    fcvt s1, h1
-; CHECK-CVT-NEXT:    fcvt s2, h2
-; CHECK-CVT-NEXT:    fcvtzu x8, s3
-; CHECK-CVT-NEXT:    fcvt s3, h0
-; CHECK-CVT-NEXT:    fcvtzu x9, s1
-; CHECK-CVT-NEXT:    fmov d0, x8
+; CHECK-CVT-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-CVT-NEXT:    mov h4, v0.h[2]
+; CHECK-CVT-NEXT:    fcvt s5, h0
+; CHECK-CVT-NEXT:    fcvt s2, h1
+; CHECK-CVT-NEXT:    mov h3, v1.h[1]
+; CHECK-CVT-NEXT:    mov h6, v1.h[2]
+; CHECK-CVT-NEXT:    fcvt s4, h4
+; CHECK-CVT-NEXT:    mov h1, v1.h[3]
+; CHECK-CVT-NEXT:    fcvtzu x9, s5
 ; CHECK-CVT-NEXT:    fcvtzu x8, s2
-; CHECK-CVT-NEXT:    fmov d1, x9
+; CHECK-CVT-NEXT:    fcvt s2, h3
+; CHECK-CVT-NEXT:    mov h3, v0.h[1]
+; CHECK-CVT-NEXT:    mov h0, v0.h[3]
+; CHECK-CVT-NEXT:    fcvt s5, h6
+; CHECK-CVT-NEXT:    fcvt s6, h1
+; CHECK-CVT-NEXT:    fcvtzu x10, s2
+; CHECK-CVT-NEXT:    fmov d2, x8
+; CHECK-CVT-NEXT:    fcvtzu x8, s4
+; CHECK-CVT-NEXT:    fcvt s3, h3
+; CHECK-CVT-NEXT:    fcvt s4, h0
+; CHECK-CVT-NEXT:    fmov d0, x9
+; CHECK-CVT-NEXT:    mov v2.d[1], x10
+; CHECK-CVT-NEXT:    fcvtzu x10, s5
+; CHECK-CVT-NEXT:    fmov d1, x8
 ; CHECK-CVT-NEXT:    fcvtzu x9, s3
-; CHECK-CVT-NEXT:    mov v0.d[1], x8
-; CHECK-CVT-NEXT:    mov v1.d[1], x9
+; CHECK-CVT-NEXT:    fcvtzu x8, s4
+; CHECK-CVT-NEXT:    fmov d3, x10
+; CHECK-CVT-NEXT:    fcvtzu x10, s6
+; CHECK-CVT-NEXT:    mov v0.d[1], x9
+; CHECK-CVT-NEXT:    mov v1.d[1], x8
+; CHECK-CVT-NEXT:    mov v3.d[1], x10
 ; CHECK-CVT-NEXT:    ret
 ;
-; CHECK-FP16-LABEL: test_unsigned_v4f16_v4i64:
+; CHECK-FP16-LABEL: test_unsigned_v8f16_v8i64:
 ; CHECK-FP16:       // %bb.0:
-; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-FP16-NEXT:    mov h1, v0.h[2]
-; CHECK-FP16-NEXT:    mov h2, v0.h[1]
-; CHECK-FP16-NEXT:    mov h3, v0.h[3]
-; CHECK-FP16-NEXT:    fcvtzu x8, h0
-; CHECK-FP16-NEXT:    fcvtzu x9, h1
-; CHECK-FP16-NEXT:    fmov d0, x8
-; CHECK-FP16-NEXT:    fcvtzu x8, h2
-; CHECK-FP16-NEXT:    fmov d1, x9
+; CHECK-FP16-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-FP16-NEXT:    mov h3, v0.h[2]
+; CHECK-FP16-NEXT:    mov h5, v0.h[3]
+; CHECK-FP16-NEXT:    fcvtzu x9, h0
+; CHECK-FP16-NEXT:    mov h2, v1.h[1]
+; CHECK-FP16-NEXT:    fcvtzu x8, h1
+; CHECK-FP16-NEXT:    mov h4, v1.h[2]
+; CHECK-FP16-NEXT:    mov h6, v1.h[3]
+; CHECK-FP16-NEXT:    fcvtzu x10, h2
+; CHECK-FP16-NEXT:    fmov d2, x8
+; CHECK-FP16-NEXT:    fcvtzu x8, h3
+; CHECK-FP16-NEXT:    mov h3, v0.h[1]
+; CHECK-FP16-NEXT:    fmov d0, x9
+; CHECK-FP16-NEXT:    mov v2.d[1], x10
+; CHECK-FP16-NEXT:    fcvtzu x10, h4
+; CHECK-FP16-NEXT:    fmov d1, x8
 ; CHECK-FP16-NEXT:    fcvtzu x9, h3
-; CHECK-FP16-NEXT:    mov v0.d[1], x8
-; CHECK-FP16-NEXT:    mov v1.d[1], x9
+; CHECK-FP16-NEXT:    fcvtzu x8, h5
+; CHECK-FP16-NEXT:    fmov d3, x10
+; CHECK-FP16-NEXT:    fcvtzu x10, h6
+; CHECK-FP16-NEXT:    mov v0.d[1], x9
+; CHECK-FP16-NEXT:    mov v1.d[1], x8
+; CHECK-FP16-NEXT:    mov v3.d[1], x10
 ; CHECK-FP16-NEXT:    ret
-    %x = call <4 x i64> @llvm.fptoui.sat.v4f16.v4i64(<4 x half> %f)
-    ret <4 x i64> %x
+    %x = call <8 x i64> @llvm.fptoui.sat.v8f16.v8i64(<8 x half> %f)
+    ret <8 x i64> %x
 }
 
-define <4 x i100> @test_unsigned_v4f16_v4i100(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i100:
+define <8 x i100> @test_unsigned_v8f16_v8i100(<8 x half> %f) {
+; CHECK-LABEL: test_unsigned_v8f16_v8i100:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #96
-; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x30, x25, [sp, #32] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x24, x23, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x22, x21, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #80] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 96
+; CHECK-NEXT:    sub sp, sp, #176
+; CHECK-NEXT:    stp d9, d8, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x29, x30, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x28, x27, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x26, x25, [sp, #112] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #128] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #144] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #160] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 176
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
@@ -1594,158 +2686,306 @@ define <4 x i100> @test_unsigned_v4f16_v4i100(<4 x half> %f) {
 ; CHECK-NEXT:    .cfi_offset w23, -40
 ; CHECK-NEXT:    .cfi_offset w24, -48
 ; CHECK-NEXT:    .cfi_offset w25, -56
-; CHECK-NEXT:    .cfi_offset w30, -64
-; CHECK-NEXT:    .cfi_offset b8, -72
-; CHECK-NEXT:    .cfi_offset b9, -80
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    mov h1, v0.h[2]
-; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    .cfi_offset w26, -64
+; CHECK-NEXT:    .cfi_offset w27, -72
+; CHECK-NEXT:    .cfi_offset w28, -80
+; CHECK-NEXT:    .cfi_offset w30, -88
+; CHECK-NEXT:    .cfi_offset w29, -96
+; CHECK-NEXT:    .cfi_offset b8, -104
+; CHECK-NEXT:    .cfi_offset b9, -112
+; CHECK-NEXT:    str q0, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    mov x19, x8
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    str q0, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    fcvt s8, h0
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov w8, #1904214015
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    mov x25, #68719476735
-; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    mov x21, #68719476735
+; CHECK-NEXT:    mov h0, v0.h[3]
 ; CHECK-NEXT:    fmov s9, w8
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x20, x21, x8, gt
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x9, [sp, #24] // 8-byte Folded Spill
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csel x23, x21, x8, gt
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    str x9, [sp, #16] // 8-byte Folded Spill
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[2]
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, xzr, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x19, x25, x9, gt
-; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csel x24, x21, x9, gt
+; CHECK-NEXT:    str x8, [sp, #32] // 8-byte Folded Spill
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    mov h0, v0.h[1]
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, xzr, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x21, x25, x9, gt
-; CHECK-NEXT:    csinv x22, x8, xzr, le
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csel x26, x21, x9, gt
+; CHECK-NEXT:    str x8, [sp, #8] // 8-byte Folded Spill
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x29, x9, xzr, le
+; CHECK-NEXT:    csel x28, x21, x8, gt
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x27, x9, xzr, le
+; CHECK-NEXT:    csel x22, x21, x8, gt
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[2]
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, xzr, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csel x23, x25, x9, gt
-; CHECK-NEXT:    csinv x24, x8, xzr, le
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    csel x25, x21, x9, gt
+; CHECK-NEXT:    str x8, [sp] // 8-byte Folded Spill
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr x11, [sp, #8] // 8-byte Folded Reload
+; CHECK-NEXT:    fmov d0, x27
+; CHECK-NEXT:    fmov d1, x29
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    mov x2, x22
-; CHECK-NEXT:    mov x3, x21
-; CHECK-NEXT:    mov x4, x20
-; CHECK-NEXT:    mov x5, x19
-; CHECK-NEXT:    mov x6, x24
+; CHECK-NEXT:    lsr x10, x22, #28
+; CHECK-NEXT:    stur x11, [x19, #75]
+; CHECK-NEXT:    lsr x11, x28, #28
+; CHECK-NEXT:    mov v0.d[1], x22
+; CHECK-NEXT:    ldr x12, [sp, #32] // 8-byte Folded Reload
+; CHECK-NEXT:    mov v1.d[1], x28
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
 ; CHECK-NEXT:    csel x9, xzr, x1, lt
 ; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    mov x7, x23
-; CHECK-NEXT:    ldp x20, x19, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    stur x12, [x19, #50]
+; CHECK-NEXT:    fmov x12, d0
+; CHECK-NEXT:    fmov x13, d1
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
-; CHECK-NEXT:    csel x1, x25, x9, gt
-; CHECK-NEXT:    ldp x22, x21, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    ldp x24, x23, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT:    mov v0.d[1], x1
-; CHECK-NEXT:    ldp x30, x25, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #96
+; CHECK-NEXT:    ldp d0, d1, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT:    csel x9, x21, x9, gt
+; CHECK-NEXT:    strb w10, [x19, #49]
+; CHECK-NEXT:    extr x10, x22, x12, #28
+; CHECK-NEXT:    bfi x9, x12, #36, #28
+; CHECK-NEXT:    stur x8, [x19, #25]
+; CHECK-NEXT:    extr x8, x28, x13, #28
+; CHECK-NEXT:    mov v0.d[1], x23
+; CHECK-NEXT:    strb w11, [x19, #24]
+; CHECK-NEXT:    mov v1.d[1], x20
+; CHECK-NEXT:    stur x10, [x19, #41]
+; CHECK-NEXT:    stur x9, [x19, #33]
+; CHECK-NEXT:    bfi x25, x13, #36, #28
+; CHECK-NEXT:    str x8, [x19, #16]
+; CHECK-NEXT:    lsr x9, x23, #28
+; CHECK-NEXT:    fmov x8, d0
+; CHECK-NEXT:    ldr x12, [sp] // 8-byte Folded Reload
+; CHECK-NEXT:    fmov x11, d1
+; CHECK-NEXT:    lsr x10, x20, #28
+; CHECK-NEXT:    strb w9, [x19, #99]
+; CHECK-NEXT:    stp x12, x25, [x19]
+; CHECK-NEXT:    extr x12, x23, x8, #28
+; CHECK-NEXT:    bfi x26, x8, #36, #28
+; CHECK-NEXT:    extr x8, x20, x11, #28
+; CHECK-NEXT:    bfi x24, x11, #36, #28
+; CHECK-NEXT:    strb w10, [x19, #74]
+; CHECK-NEXT:    stur x12, [x19, #91]
+; CHECK-NEXT:    stur x26, [x19, #83]
+; CHECK-NEXT:    stur x8, [x19, #66]
+; CHECK-NEXT:    stur x24, [x19, #58]
+; CHECK-NEXT:    ldp x20, x19, [sp, #160] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #144] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #128] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x26, x25, [sp, #112] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x28, x27, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x29, x30, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d9, d8, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    add sp, sp, #176
 ; CHECK-NEXT:    ret
-    %x = call <4 x i100> @llvm.fptoui.sat.v4f16.v4i100(<4 x half> %f)
-    ret <4 x i100> %x
+    %x = call <8 x i100> @llvm.fptoui.sat.v8f16.v8i100(<8 x half> %f)
+    ret <8 x i100> %x
 }
 
-define <4 x i128> @test_unsigned_v4f16_v4i128(<4 x half> %f) {
-; CHECK-LABEL: test_unsigned_v4f16_v4i128:
+define <8 x i128> @test_unsigned_v8f16_v8i128(<8 x half> %f) {
+; CHECK-LABEL: test_unsigned_v8f16_v8i128:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #96
-; CHECK-NEXT:    stp d9, d8, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    str x30, [sp, #32] // 8-byte Folded Spill
-; CHECK-NEXT:    stp x24, x23, [sp, #48] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x22, x21, [sp, #64] // 16-byte Folded Spill
-; CHECK-NEXT:    stp x20, x19, [sp, #80] // 16-byte Folded Spill
-; CHECK-NEXT:    .cfi_def_cfa_offset 96
+; CHECK-NEXT:    sub sp, sp, #176
+; CHECK-NEXT:    stp d9, d8, [sp, #64] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x29, x30, [sp, #80] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x28, x27, [sp, #96] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x26, x25, [sp, #112] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x24, x23, [sp, #128] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x22, x21, [sp, #144] // 16-byte Folded Spill
+; CHECK-NEXT:    stp x20, x19, [sp, #160] // 16-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 176
 ; CHECK-NEXT:    .cfi_offset w19, -8
 ; CHECK-NEXT:    .cfi_offset w20, -16
 ; CHECK-NEXT:    .cfi_offset w21, -24
 ; CHECK-NEXT:    .cfi_offset w22, -32
 ; CHECK-NEXT:    .cfi_offset w23, -40
 ; CHECK-NEXT:    .cfi_offset w24, -48
-; CHECK-NEXT:    .cfi_offset w30, -64
-; CHECK-NEXT:    .cfi_offset b8, -72
-; CHECK-NEXT:    .cfi_offset b9, -80
-; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-NEXT:    mov h1, v0.h[1]
-; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
-; CHECK-NEXT:    fcvt s8, h1
+; CHECK-NEXT:    .cfi_offset w25, -56
+; CHECK-NEXT:    .cfi_offset w26, -64
+; CHECK-NEXT:    .cfi_offset w27, -72
+; CHECK-NEXT:    .cfi_offset w28, -80
+; CHECK-NEXT:    .cfi_offset w30, -88
+; CHECK-NEXT:    .cfi_offset w29, -96
+; CHECK-NEXT:    .cfi_offset b8, -104
+; CHECK-NEXT:    .cfi_offset b9, -112
+; CHECK-NEXT:    str q0, [sp, #48] // 16-byte Folded Spill
+; CHECK-NEXT:    mov x19, x8
+; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    str q0, [sp, #32] // 16-byte Folded Spill
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    mov w8, #2139095039
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    mov h0, v0.h[1]
 ; CHECK-NEXT:    fmov s9, w8
 ; CHECK-NEXT:    csel x8, xzr, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csinv x19, x9, xzr, le
-; CHECK-NEXT:    csinv x20, x8, xzr, le
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csinv x8, x8, xzr, le
 ; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    stp x8, x9, [sp, #16] // 16-byte Folded Spill
 ; CHECK-NEXT:    bl __fixunssfti
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    csinv x8, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    stp x8, x9, [sp] // 16-byte Folded Spill
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, #0.0
 ; CHECK-NEXT:    mov h0, v0.h[3]
 ; CHECK-NEXT:    csel x8, xzr, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csinv x21, x9, xzr, le
-; CHECK-NEXT:    csinv x22, x8, xzr, le
+; CHECK-NEXT:    csinv x24, x9, xzr, le
+; CHECK-NEXT:    csinv x25, x8, xzr, le
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    csel x8, xzr, x1, lt
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    fcvt s8, h0
-; CHECK-NEXT:    csinv x23, x9, xzr, le
-; CHECK-NEXT:    csinv x24, x8, xzr, le
+; CHECK-NEXT:    csinv x26, x9, xzr, le
+; CHECK-NEXT:    csinv x27, x8, xzr, le
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, #0.0
-; CHECK-NEXT:    mov x2, x19
-; CHECK-NEXT:    mov x3, x20
-; CHECK-NEXT:    mov x4, x21
-; CHECK-NEXT:    mov x5, x22
-; CHECK-NEXT:    mov x6, x23
-; CHECK-NEXT:    csel x8, xzr, x0, lt
-; CHECK-NEXT:    csel x9, xzr, x1, lt
+; CHECK-NEXT:    mov h0, v0.h[1]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    fcmp s8, s9
-; CHECK-NEXT:    mov x7, x24
-; CHECK-NEXT:    ldp x20, x19, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x28, x9, xzr, le
+; CHECK-NEXT:    csinv x29, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[2]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x20, x9, xzr, le
+; CHECK-NEXT:    csinv x21, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr q0, [sp, #48] // 16-byte Folded Reload
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    mov h0, v0.h[3]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    fcvt s8, h0
+; CHECK-NEXT:    csinv x22, x9, xzr, le
+; CHECK-NEXT:    csinv x23, x8, xzr, le
+; CHECK-NEXT:    fmov s0, s8
+; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    fcmp s8, #0.0
+; CHECK-NEXT:    stp x22, x23, [x19, #32]
+; CHECK-NEXT:    stp x20, x21, [x19, #16]
+; CHECK-NEXT:    stp x28, x29, [x19]
+; CHECK-NEXT:    csel x8, xzr, x1, lt
+; CHECK-NEXT:    csel x9, xzr, x0, lt
+; CHECK-NEXT:    fcmp s8, s9
+; CHECK-NEXT:    stp x26, x27, [x19, #112]
+; CHECK-NEXT:    stp x24, x25, [x19, #96]
 ; CHECK-NEXT:    csinv x8, x8, xzr, le
-; CHECK-NEXT:    csinv x1, x9, xzr, le
-; CHECK-NEXT:    ldp x22, x21, [sp, #64] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    ldr x30, [sp, #32] // 8-byte Folded Reload
-; CHECK-NEXT:    ldp x24, x23, [sp, #48] // 16-byte Folded Reload
-; CHECK-NEXT:    mov v0.d[1], x1
-; CHECK-NEXT:    ldp d9, d8, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    fmov x0, d0
-; CHECK-NEXT:    add sp, sp, #96
+; CHECK-NEXT:    csinv x9, x9, xzr, le
+; CHECK-NEXT:    stp x9, x8, [x19, #48]
+; CHECK-NEXT:    ldr x8, [sp] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #88]
+; CHECK-NEXT:    ldr x8, [sp, #8] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #80]
+; CHECK-NEXT:    ldr x8, [sp, #16] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #72]
+; CHECK-NEXT:    ldr x8, [sp, #24] // 8-byte Folded Reload
+; CHECK-NEXT:    str x8, [x19, #64]
+; CHECK-NEXT:    ldp x20, x19, [sp, #160] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x22, x21, [sp, #144] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x24, x23, [sp, #128] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x26, x25, [sp, #112] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x28, x27, [sp, #96] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp x29, x30, [sp, #80] // 16-byte Folded Reload
+; CHECK-NEXT:    ldp d9, d8, [sp, #64] // 16-byte Folded Reload
+; CHECK-NEXT:    add sp, sp, #176
 ; CHECK-NEXT:    ret
-    %x = call <4 x i128> @llvm.fptoui.sat.v4f16.v4i128(<4 x half> %f)
-    ret <4 x i128> %x
+    %x = call <8 x i128> @llvm.fptoui.sat.v8f16.v8i128(<8 x half> %f)
+    ret <8 x i128> %x
 }
-


        


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