[PATCH] D111117: [RISCV] Optimize (add (shl x, c0), c1)
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 13 22:03:19 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6468
+ int64_t C1 = N1C->getSExtValue();
+ if (C0 <= 1 || isInt<12>(C1) || (C1 >> C0) == 0 || !isInt<12>(C1 >> C0) ||
+ !isInt<12>(C1 - (C1 >> C0 << C0)))
----------------
I think you need to abort if C0 is greater than VT.getSizeInBits() - 1.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111117/new/
https://reviews.llvm.org/D111117
More information about the llvm-commits
mailing list