[PATCH] D110865: X86InstrInfo: Optimize more combinations of SUB+CMP

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 13 20:58:05 PDT 2021


pengfei added a comment.

In D110865#3062884 <https://reviews.llvm.org/D110865#3062884>, @MatzeB wrote:

>> Do we have such CMP + CMP cases in reality? I think optimization should merged them already. The only case I can think is eflags are clobbered, so that we have to def them again which can't be optimizated here either.
>
> Yes we do:
>
> - If they are in different basic blocks, then SelectionDAG won't merge them.
> - SelectionDAG has a tendency to canonicalize into different directions. My motivating sourcecode here says `if (x == 1) { ... } else if (x > 1) { ... }` but SeletionDAG normalizes that to `x == 1` and `x >= 2` so generic mechanisms like MachineCSE are not catching it.
> - I've also seen several examples now, where we middleend canonicalization for i1 values leads to strange outcomes. You can for example look at https://godbolt.org/z/1T63zKqvc and see how the same comparison is repeated there (yes we should rather fix the root cause for that, but for now it's one more example of duplicated comparisons).

Makes sense to me. Thank you!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110865/new/

https://reviews.llvm.org/D110865



More information about the llvm-commits mailing list