[PATCH] D111117: [RISCV] Optimize (add (shl x, c0), c1)
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 13 18:20:11 PDT 2021
benshi001 updated this revision to Diff 379574.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111117/new/
https://reviews.llvm.org/D111117
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/shlimm-addimm.ll
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