[PATCH] D111433: [PowerPC] Respect rounding mode in the back end
Qiu Chaofan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 13 07:58:46 PDT 2021
qiucf added a comment.
Thanks for fixing this!
I guess the reason to restrict them only undef strict-fp is performance? Since FPSCR is not modeled yet, if so, we may need to re-define all float instructions like this patch when implementing FPSCR model?
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:5228
+ RetOpc = PPCISD::CALL;
+ if (IsStrictFPCall) {
+ switch (RetOpc) {
----------------
Better to move this into a static function?
================
Comment at: llvm/lib/Target/PowerPC/PPCInstr64Bit.td:181
+let isCall = 1, PPC970_Unit = 7, Defs = [LR8, RM], hasSideEffects = 0,
+ isCodeGenOnly = 1, Uses = [RM] in {
----------------
Can they be implemented through `multiclass/defm`?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D111433/new/
https://reviews.llvm.org/D111433
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