[PATCH] D109117: [hexagon] Add system register, transfer support
Brian Cain via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 12 19:37:22 PDT 2021
bcain updated this revision to Diff 379252.
bcain added a comment.
Updated to address further PRM mismatches.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109117/new/
https://reviews.llvm.org/D109117
Files:
llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
llvm/test/MC/Hexagon/sysregs.s
llvm/test/MC/Hexagon/sysregs2.s
llvm/test/MC/Hexagon/sysregs3.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D109117.379252.patch
Type: text/x-patch
Size: 27936 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211013/992fd844/attachment-0001.bin>
More information about the llvm-commits
mailing list