[PATCH] D111062: [RISCV] Rename some assembler mnemonic and intrinsic functions for RVV 1.0.

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:1378
+def : InstAlias<"vmornot.mm $vd, $vs2, $vs1",
+                (VMORN_MM VR:$vd, VR:$vs2, VR:$vs1), 0>;
+
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Ugh, spec mandating aliases for the pre-ratified names... this is just going to encourage people who don't know any better to use the old names and you'll never be able to kill it off :(


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll:1
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
+  ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+  ; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
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Revert

(how do you even manage that, the NOTE line is autogenerated...)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D111062/new/

https://reviews.llvm.org/D111062