[PATCH] D111523: [AMDGPU] Fix 24 bit mul intrinsic generation for > 32 bit result.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 12 07:39:00 PDT 2021
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:511-512
+ // operands.
+ if (LHSNumBits > 24 || RHSNumBits > 24)
+ return false;
+
----------------
These checks are already done below, and done better because they can use the u24 or i24 instruction as appropriate.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:515
+ // The product's bit width should not exceed 32.
+ if (LHSNumBits + RHSNumBits > 32)
+ return false;
----------------
This check probably needs to be done after we've decided whether to use the u24 or i24 instruction.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111523/new/
https://reviews.llvm.org/D111523
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