[PATCH] D111530: [TargetLowering] Optimize expanded SRL/SHL fed into SETCC ne/eq 0
Filipp Zhinkin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 11 14:18:48 PDT 2021
fzhinkin added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:3411
+
+ auto Or = N0.getOperand(0);
+ auto Shift = N0.getOperand(1);
----------------
craig.topper wrote:
> Please use SDValue. LLVM is pretty conservative about the use of auto. https://llvm.org/docs/CodingStandards.html#use-auto-type-deduction-to-make-code-more-readable
Thanks for pointing to it, fixed.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111530/new/
https://reviews.llvm.org/D111530
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