[PATCH] D111576: [X86] WIP Prefer VEX encoding in X86 assembler.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: LuoYuanke, pengfei, RKSimon.
Herald added a subscriber: hiraditya.
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An alternative version of D111538 <https://reviews.llvm.org/D111538> and D111505 <https://reviews.llvm.org/D111505>. Attempting to create different operands for the VEX and EVEX instructions so that the AsmMatcher will infer an order for them. This is similar to how we normally prefer VEX over EVEX. The VEX register classes are smaller so they get ordered before the EVEX register classes.

Naming of the new operand types isn't great. Patch needs more comments. Had to make a hack to the EVEX2VEX emitter. Not sure if that's the best fix for it.

Maybe we should change the operands for the EVEX instructions instead of the VEX instructions.

Mainly posting this as inspiration for Yuanke. I don't know if I have time to finish this myself


https://reviews.llvm.org/D111576

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/AsmParser/X86Operand.h
  llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp
  llvm/utils/TableGen/X86RecognizableInstr.cpp

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