[PATCH] D111441: [SVE][CodeGen] Add patterns for ADD/SUB + element count

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 11 06:15:59 PDT 2021


sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1455
   defm CNTP_XPP : sve_int_pcount_pred<0b0000, "cntp", int_aarch64_sve_cntp>;
+  }
 
----------------
nit: indentation?


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1466
 
+  let Predicates = [HasSVEorStreamingSVE] in {
   defm SQINCB_XPiWdI : sve_int_pred_pattern_b_s32<0b00000, "sqincb", int_aarch64_sve_sqincb_n32>;
----------------
nit: same indentation here and below.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:927
+  let Predicates = [HasSVEorStreamingSVE] in {
   def NAME : sve_int_pred_pattern_a<opc, asm>;
 
----------------
nit: indentation.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:935
+
+  let Predicates = [HasSVEorStreamingSVE, UseScalarIncVL] in {
+  def : Pat<(i64 (op GPR64:$Rdn, (opcnt sve_pred_enum:$pattern))),
----------------
nit: indentation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111441/new/

https://reviews.llvm.org/D111441



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