[PATCH] D111538: [X86] Prefer VEX encoding in X86 assembler.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke created this revision.
Herald added subscribers: pengfei, hiraditya.
LuoYuanke requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch is to order the AVX instructions ahead of AVX512 instructions
in the matching table so that the AVX instructions can be matched first.
Thanks Craig for the idea.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111538

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/utils/TableGen/AsmMatcherEmitter.cpp


Index: llvm/utils/TableGen/AsmMatcherEmitter.cpp
===================================================================
--- llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -636,7 +636,7 @@
     if (RequiredFeatures.size() != RHS.RequiredFeatures.size())
       return RequiredFeatures.size() > RHS.RequiredFeatures.size();
 
-    return false;
+    return TheDef->getID() < RHS.TheDef->getID();
   }
 
   /// couldMatchAmbiguouslyWith - Check whether this matchable could
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4270,24 +4270,6 @@
        ForcedVEXEncoding != VEXEncoding_VEX3))
     return Match_Unsupported;
 
-  // These instructions match ambiguously with their VEX encoded counterparts
-  // and appear first in the matching table. Reject them unless we're forcing
-  // EVEX encoding.
-  // FIXME: We really need a way to break the ambiguity.
-  switch (Opc) {
-  case X86::VCVTSD2SIZrm_Int:
-  case X86::VCVTSD2SI64Zrm_Int:
-  case X86::VCVTSS2SIZrm_Int:
-  case X86::VCVTSS2SI64Zrm_Int:
-  case X86::VCVTTSD2SIZrm:   case X86::VCVTTSD2SIZrm_Int:
-  case X86::VCVTTSD2SI64Zrm: case X86::VCVTTSD2SI64Zrm_Int:
-  case X86::VCVTTSS2SIZrm:   case X86::VCVTTSS2SIZrm_Int:
-  case X86::VCVTTSS2SI64Zrm: case X86::VCVTTSS2SI64Zrm_Int:
-    if (ForcedVEXEncoding != VEXEncoding_EVEX)
-      return Match_Unsupported;
-    break;
-  }
-
   return Match_Success;
 }
 


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