[PATCH] D111497: m68k: Support bit shifts on 64-bit integers

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


================
Comment at: llvm/lib/Target/M68k/M68kISelLowering.cpp:1321
 
+SDValue M68kTargetLowering::LowerShiftLeftParts(SDValue Op,
+                                                SelectionDAG &DAG) const {
----------------
Keep order in this file consistent with the header


================
Comment at: llvm/lib/Target/M68k/M68kISelLowering.cpp:1329
+
+  // if Shamt-XLEN < 0: // Shamt < XLEN
+  //   Lo = Lo << Shamt
----------------
XLEN is a RISC-V-specific term, referring to the size of its X registers


================
Comment at: llvm/lib/Target/M68k/M68kISelLowering.h:138
   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
+  SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
----------------
Don't group with LowerOperation, and put these with all the other LowerX in the private section below (maybe in the same order as the LowerOperation switch?)


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111497/new/

https://reviews.llvm.org/D111497