[PATCH] D111433: [PowerPC] Respect rounding mode in the back end

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 8 08:57:25 PDT 2021


nemanjai created this revision.
nemanjai added a reviewer: PowerPC.
Herald added subscribers: shchenz, kbarton, hiraditya.
nemanjai requested review of this revision.
Herald added a project: LLVM.

Currently, the floating point instructions that depend on rounding mode are correctly marked in the PPC back end with an implicit use of the `RM` register. Similarly, instructions that explicitly define the register are marked with an implicit def of the same register. So for the most part, RM-using code won't be moved across RM-setting instructions.

However, calls are not marked as RM-setting instructions so code can be moved across calls. This is generally desired, but so is the ability to turn off this behaviour with an appropriate option - and `-frounding-math` really should be that option.

This patch provides a set of call instructions (for direct and indirect calls) that are marked with an implicit def of the `RM` register. These will be used for calls that are marked with the `strictfp` attribute.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111433

Files:
  llvm/lib/Target/PowerPC/P9InstrResources.td
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/cse-despite-rounding-mode.ll
  llvm/test/CodeGen/PowerPC/respect-rounding-mode.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

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