[PATCH] D111411: [AArch64] Asynchronous unwind - function prologues

[Momchil Velikov via Phabricator via llvm-commits]

chill created this revision.
chill added reviewers: t.p.northover, efriedma, sdesmalen, david-arm, samtebbs, danielkiss.
Herald added subscribers: asbirlea, hiraditya, kristof.beyls, arichardson.
chill requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch rearranges emission of CFI instructions, so the resulting DWARF and `.eh_table` information is
precise at every instruction.

The current state is that the unwind info is emitted only after the function prologue. This is fine for synchronous (e.g. C++)  exceptions, but
the information is generally incorrect when the program counter is at an instruction in the prologue or the epilogue, for example:

  stp	x29, x30, [sp, #-16]!           // 16-byte Folded Spill
  mov	x29, sp
  .cfi_def_cfa w29, 16
  ...

after the `stp` is executed the (initial) rule for the CFA still says the CFA is in the `sp`, even though it's already offset by 16 bytes

A correct unwind info could look like:

  stp	x29, x30, [sp, #-16]!           // 16-byte Folded Spill
  .cfi_def_cfa_offset 16
  mov	x29, sp
  .cfi_def_cfa w29, 16
  ...

Having this information precise up to an instruction is useful for sampling profilers that would like to get a stack backtrace. The end goal
(towards this patch is just a step) is to have fully working `-fasynchronous-unwind-tables`.


https://reviews.llvm.org/D111411

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/lib/Target/AArch64/AArch64FrameLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
  llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
  llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
  llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
  llvm/test/CodeGen/AArch64/arm64-custom-call-saved-reg.ll
  llvm/test/CodeGen/AArch64/arm64-fp128.ll
  llvm/test/CodeGen/AArch64/arm64-large-frame.ll
  llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
  llvm/test/CodeGen/AArch64/arm64-neon-mul-div.ll
  llvm/test/CodeGen/AArch64/arm64-patchpoint.ll
  llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
  llvm/test/CodeGen/AArch64/cmp-select-sign.ll
  llvm/test/CodeGen/AArch64/cmpxchg-idioms.ll
  llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
  llvm/test/CodeGen/AArch64/csr-split.ll
  llvm/test/CodeGen/AArch64/fastcc.ll
  llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
  llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
  llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
  llvm/test/CodeGen/AArch64/framelayout-sve.mir
  llvm/test/CodeGen/AArch64/framelayout-unaligned-fp.ll
  llvm/test/CodeGen/AArch64/isinf.ll
  llvm/test/CodeGen/AArch64/large-stack.ll
  llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll
  llvm/test/CodeGen/AArch64/local_vars.ll
  llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll
  llvm/test/CodeGen/AArch64/machine-outliner-throw2.ll
  llvm/test/CodeGen/AArch64/neg-imm.ll
  llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
  llvm/test/CodeGen/AArch64/settag.ll
  llvm/test/CodeGen/AArch64/shrink-wrapping-vla.ll
  llvm/test/CodeGen/AArch64/sibling-call.ll
  llvm/test/CodeGen/AArch64/split-vector-insert.ll
  llvm/test/CodeGen/AArch64/stack-guard-remat-bitcast.ll
  llvm/test/CodeGen/AArch64/stack-guard-sysreg.ll
  llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
  llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
  llvm/test/CodeGen/AArch64/sve-insert-element.ll
  llvm/test/CodeGen/AArch64/sve-insert-vector.ll
  llvm/test/CodeGen/AArch64/sve-pred-arith.ll
  llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
  llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
  llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
  llvm/test/CodeGen/AArch64/sve-trunc.ll
  llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
  llvm/test/CodeGen/AArch64/unwind-preserved.ll
  llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
  llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.generated.expected
  llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.nogenerated.expected

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