[PATCH] D111007: [TwoAddressInstruction] Enable machine verification after this pass

[Jay Foad via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG27c57e791a0a: [TwoAddressInstruction] Enable machine verification after this pass (authored by foad).

Changed prior to commit:
  https://reviews.llvm.org/D111007?vs=376745&id=377957#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111007/new/

https://reviews.llvm.org/D111007

Files:
  llvm/lib/CodeGen/TargetPassConfig.cpp


Index: llvm/lib/CodeGen/TargetPassConfig.cpp
===================================================================
--- llvm/lib/CodeGen/TargetPassConfig.cpp
+++ llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -1418,7 +1418,7 @@
 /// register allocation. No coalescing or scheduling.
 void TargetPassConfig::addFastRegAlloc() {
   addPass(&PHIEliminationID);
-  addPass(&TwoAddressInstructionPassID, false);
+  addPass(&TwoAddressInstructionPassID);
 
   addRegAssignAndRewriteFast();
 }
@@ -1452,7 +1452,7 @@
   if (EarlyLiveIntervals)
     addPass(&LiveIntervalsID);
 
-  addPass(&TwoAddressInstructionPassID, false);
+  addPass(&TwoAddressInstructionPassID);
   addPass(&RegisterCoalescerID);
 
   // The machine scheduler may accidentally create disconnected components


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