[PATCH] D91354: [AArch64] Lower @llvm.complex.multiply using fcmla (WIP).

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3939
+    SDValue Part1 =
+        DAG.getNode(AArch64ISD::FCMLA, dl, Op.getValueType(),
+                    DAG.getConstantFP(0.0, dl, ResVT), Op.getOperand(1),
----------------
Can (unsupported?) FP16 and FP64 hit here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91354/new/

https://reviews.llvm.org/D91354