[llvm] 92128b7 - [AArch64] Regenerate even more tests
David Green via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 6 06:32:06 PDT 2021
Author: David Green
Date: 2021-10-06T14:32:01+01:00
New Revision: 92128b7801fdff86970145854d3d7f0a514d1700
URL: https://github.com/llvm/llvm-project/commit/92128b7801fdff86970145854d3d7f0a514d1700
DIFF: https://github.com/llvm/llvm-project/commit/92128b7801fdff86970145854d3d7f0a514d1700.diff
LOG: [AArch64] Regenerate even more tests
This updates a few more check lines, in some mte tests that were close
to auto generated already and some CodeGenPrepare/consthoist tests where
being able to see the entire code sequence is useful for determining
whether code differences are improvements or not.
Added:
Modified:
llvm/test/CodeGen/AArch64/consthoist-gep.ll
llvm/test/CodeGen/AArch64/settag.ll
llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-pre-inc-offset-check.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/consthoist-gep.ll b/llvm/test/CodeGen/AArch64/consthoist-gep.ll
index df2579926b1cf..fbd2a353d77c1 100644
--- a/llvm/test/CodeGen/AArch64/consthoist-gep.ll
+++ b/llvm/test/CodeGen/AArch64/consthoist-gep.ll
@@ -1,11 +1,7 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-none-unknown-linuxeabi -consthoist-gep %s -o - | FileCheck %s
; RUN: llc -mtriple=aarch64-none-unknown-linuxeabi -consthoist-gep -opaque-pointers %s -o - | FileCheck %s
-; CHECK-NOT: adrp x10, global+332
-; CHECK-NOT: add x10, x10, :lo12:global+332
-; CHECK: adrp x10, global+528
-; CHECK-NEXT: add x10, x10, :lo12:global+528
-
%struct.blam = type { %struct.bar, %struct.bar.0, %struct.wobble, %struct.wombat, i8, i16, %struct.snork.2, %struct.foo, %struct.snork.3, %struct.wobble.4, %struct.quux, [9 x i16], %struct.spam, %struct.zot }
%struct.bar = type { i8, i8, %struct.snork }
%struct.snork = type { i16, i8, i8 }
@@ -30,6 +26,53 @@
; Function Attrs: norecurse nounwind optsize ssp
define dso_local void @blam() local_unnamed_addr #0 {
+; CHECK-LABEL: blam:
+; CHECK: // %bb.0: // %bb
+; CHECK-NEXT: adrp x8, global+174
+; CHECK-NEXT: add x8, x8, :lo12:global+174
+; CHECK-NEXT: ldrb w9, [x8]
+; CHECK-NEXT: tbnz w9, #0, .LBB0_2
+; CHECK-NEXT: // %bb.1: // %bb3
+; CHECK-NEXT: mov w9, #44032
+; CHECK-NEXT: movk w9, #12296, lsl #16
+; CHECK-NEXT: ldr w10, [x9]
+; CHECK-NEXT: orr w11, w9, #0x4
+; CHECK-NEXT: stur w10, [x8, #158]
+; CHECK-NEXT: ldr w10, [x11]
+; CHECK-NEXT: orr w11, w9, #0x8
+; CHECK-NEXT: and w10, w10, #0xffff
+; CHECK-NEXT: stur w10, [x8, #162]
+; CHECK-NEXT: ldr w10, [x11]
+; CHECK-NEXT: orr w11, w9, #0xc
+; CHECK-NEXT: and w10, w10, #0x1f1f1f1f
+; CHECK-NEXT: stur w10, [x8, #166]
+; CHECK-NEXT: ldr w10, [x11]
+; CHECK-NEXT: mov w11, #172
+; CHECK-NEXT: orr w11, w9, w11
+; CHECK-NEXT: and w10, w10, #0x1f1f1f1f
+; CHECK-NEXT: stur w10, [x8, #170]
+; CHECK-NEXT: ldr w8, [x11]
+; CHECK-NEXT: adrp x10, global+528
+; CHECK-NEXT: add x10, x10, :lo12:global+528
+; CHECK-NEXT: mov w11, #176
+; CHECK-NEXT: and w8, w8, #0xffffff
+; CHECK-NEXT: orr w11, w9, w11
+; CHECK-NEXT: str w8, [x10]
+; CHECK-NEXT: ldr w8, [x11]
+; CHECK-NEXT: mov w11, #180
+; CHECK-NEXT: orr w11, w9, w11
+; CHECK-NEXT: and w8, w8, #0xffffff
+; CHECK-NEXT: str w8, [x10, #4]
+; CHECK-NEXT: ldr w8, [x11]
+; CHECK-NEXT: mov w11, #184
+; CHECK-NEXT: and w8, w8, #0xffffff
+; CHECK-NEXT: str w8, [x10, #8]
+; CHECK-NEXT: orr w8, w9, w11
+; CHECK-NEXT: ldr w8, [x8]
+; CHECK-NEXT: and w8, w8, #0xffffff
+; CHECK-NEXT: str w8, [x10, #12]
+; CHECK-NEXT: .LBB0_2: // %bb19
+; CHECK-NEXT: ret
bb:
%tmp = load i8, i8* getelementptr inbounds (%struct.blam, %struct.blam* @global, i32 0, i32 7, i32 9), align 2, !tbaa !3
%tmp1 = and i8 %tmp, 1
diff --git a/llvm/test/CodeGen/AArch64/settag.ll b/llvm/test/CodeGen/AArch64/settag.ll
index 3deeb0155fe87..de4aa3e6de78b 100644
--- a/llvm/test/CodeGen/AArch64/settag.ll
+++ b/llvm/test/CodeGen/AArch64/settag.ll
@@ -1,133 +1,167 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64 -mattr=+mte | FileCheck %s
define void @stg1(i8* %p) {
-entry:
; CHECK-LABEL: stg1:
-; CHECK: stg x0, [x0]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stg x0, [x0]
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 16)
ret void
}
define void @stg2(i8* %p) {
-entry:
; CHECK-LABEL: stg2:
-; CHECK: st2g x0, [x0]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: st2g x0, [x0]
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 32)
ret void
}
define void @stg3(i8* %p) {
-entry:
; CHECK-LABEL: stg3:
-; CHECK: stg x0, [x0, #32]
-; CHECK: st2g x0, [x0]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stg x0, [x0, #32]
+; CHECK-NEXT: st2g x0, [x0]
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 48)
ret void
}
define void @stg4(i8* %p) {
-entry:
; CHECK-LABEL: stg4:
-; CHECK: st2g x0, [x0, #32]
-; CHECK: st2g x0, [x0]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: st2g x0, [x0, #32]
+; CHECK-NEXT: st2g x0, [x0]
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 64)
ret void
}
define void @stg5(i8* %p) {
-entry:
; CHECK-LABEL: stg5:
-; CHECK: stg x0, [x0, #64]
-; CHECK: st2g x0, [x0, #32]
-; CHECK: st2g x0, [x0]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stg x0, [x0, #64]
+; CHECK-NEXT: st2g x0, [x0, #32]
+; CHECK-NEXT: st2g x0, [x0]
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 80)
ret void
}
define void @stg16(i8* %p) {
-entry:
; CHECK-LABEL: stg16:
-; CHECK: mov {{(w|x)}}[[R:[0-9]+]], #256
-; CHECK: st2g x0, [x0], #32
-; CHECK: sub x[[R]], x[[R]], #32
-; CHECK: cbnz x[[R]],
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x8, #256
+; CHECK-NEXT: .LBB5_1: // %entry
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: st2g x0, [x0], #32
+; CHECK-NEXT: sub x8, x8, #32
+; CHECK-NEXT: cbnz x8, .LBB5_1
+; CHECK-NEXT: // %bb.2: // %entry
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 256)
ret void
}
define void @stg17(i8* %p) {
-entry:
; CHECK-LABEL: stg17:
-; CHECK: stg x0, [x0], #16
-; CHECK: mov {{(w|x)}}[[R:[0-9]+]], #256
-; CHECK: st2g x0, [x0], #32
-; CHECK: sub x[[R]], x[[R]], #32
-; CHECK: cbnz x[[R]],
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stg x0, [x0], #16
+; CHECK-NEXT: mov x8, #256
+; CHECK-NEXT: .LBB6_1: // %entry
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: st2g x0, [x0], #32
+; CHECK-NEXT: sub x8, x8, #32
+; CHECK-NEXT: cbnz x8, .LBB6_1
+; CHECK-NEXT: // %bb.2: // %entry
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag(i8* %p, i64 272)
ret void
}
define void @stzg3(i8* %p) {
-entry:
; CHECK-LABEL: stzg3:
-; CHECK: stzg x0, [x0, #32]
-; CHECK: stz2g x0, [x0]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stzg x0, [x0, #32]
+; CHECK-NEXT: stz2g x0, [x0]
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag.zero(i8* %p, i64 48)
ret void
}
define void @stzg17(i8* %p) {
-entry:
; CHECK-LABEL: stzg17:
-; CHECK: stzg x0, [x0], #16
-; CHECK: mov {{w|x}}[[R:[0-9]+]], #256
-; CHECK: stz2g x0, [x0], #32
-; CHECK: sub x[[R]], x[[R]], #32
-; CHECK: cbnz x[[R]],
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stzg x0, [x0], #16
+; CHECK-NEXT: mov x8, #256
+; CHECK-NEXT: .LBB8_1: // %entry
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: stz2g x0, [x0], #32
+; CHECK-NEXT: sub x8, x8, #32
+; CHECK-NEXT: cbnz x8, .LBB8_1
+; CHECK-NEXT: // %bb.2: // %entry
+; CHECK-NEXT: ret
+entry:
call void @llvm.aarch64.settag.zero(i8* %p, i64 272)
ret void
}
define void @stg_alloca1() {
-entry:
; CHECK-LABEL: stg_alloca1:
-; CHECK: stg sp, [sp]
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: sub sp, sp, #16
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: stg sp, [sp], #16
+; CHECK-NEXT: ret
+entry:
%a = alloca i8, i32 16, align 16
call void @llvm.aarch64.settag(i8* %a, i64 16)
ret void
}
define void @stg_alloca5() {
-entry:
; CHECK-LABEL: stg_alloca5:
-; CHECK: st2g sp, [sp, #32]
-; CHECK-NEXT: stg sp, [sp, #64]
-; CHECK-NEXT: st2g sp, [sp], #80
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: sub sp, sp, #80
+; CHECK-NEXT: .cfi_def_cfa_offset 80
+; CHECK-NEXT: st2g sp, [sp, #32]
+; CHECK-NEXT: stg sp, [sp, #64]
+; CHECK-NEXT: st2g sp, [sp], #80
; CHECK-NEXT: ret
+entry:
%a = alloca i8, i32 80, align 16
call void @llvm.aarch64.settag(i8* %a, i64 80)
ret void
}
define void @stg_alloca17() {
-entry:
; CHECK-LABEL: stg_alloca17:
-; CHECK: mov {{w|x}}[[R:[0-9]+]], #256
-; CHECK: st2g sp, [sp], #32
-; CHECK: sub x[[R]], x[[R]], #32
-; CHECK: cbnz x[[R]],
-; CHECK: stg sp, [sp], #16
-; CHECK: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: sub sp, sp, #288
+; CHECK-NEXT: str x29, [sp, #272] // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 288
+; CHECK-NEXT: .cfi_offset w29, -16
+; CHECK-NEXT: mov x8, #256
+; CHECK-NEXT: .LBB11_1: // %entry
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: st2g sp, [sp], #32
+; CHECK-NEXT: sub x8, x8, #32
+; CHECK-NEXT: cbnz x8, .LBB11_1
+; CHECK-NEXT: // %bb.2: // %entry
+; CHECK-NEXT: stg sp, [sp], #16
+; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: ret
+entry:
%a = alloca i8, i32 272, align 16
call void @llvm.aarch64.settag(i8* %a, i64 272)
ret void
diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
index 005ea37288ceb..a7705d63451c2 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
@@ -1,24 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
%struct_type = type { [10000 x i32], i32, i32 }
define void @test1(%struct_type** %s, i32 %n) {
-; CHECK-LABEL: test1
+; CHECK-LABEL: test1:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr x9, [x0]
+; CHECK-NEXT: mov w10, #40000
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: add x9, x9, x10
+; CHECK-NEXT: cmp w8, w1
+; CHECK-NEXT: b.ge .LBB0_2
+; CHECK-NEXT: .LBB0_1: // %while_body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: str w8, [x9, #4]
+; CHECK-NEXT: add w8, w8, #1
+; CHECK-NEXT: str w8, [x9]
+; CHECK-NEXT: cmp w8, w1
+; CHECK-NEXT: b.lt .LBB0_1
+; CHECK-NEXT: .LBB0_2: // %while_end
+; CHECK-NEXT: ret
entry:
%struct = load %struct_type*, %struct_type** %s
br label %while_cond
while_cond:
%phi = phi i32 [ 0, %entry ], [ %i, %while_body ]
-; CHECK: mov w{{[0-9]+}}, #40000
-; CHECK-NOT: mov w{{[0-9]+}}, #40004
%gep0 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 1
%gep1 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 2
%cmp = icmp slt i32 %phi, %n
br i1 %cmp, label %while_body, label %while_end
while_body:
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #4]
%i = add i32 %phi, 1
store i32 %i, i32* %gep0
store i32 %phi, i32* %gep1
@@ -29,22 +43,36 @@ while_end:
}
define void @test2(%struct_type* %struct, i32 %n) {
-; CHECK-LABEL: test2
+; CHECK-LABEL: test2:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: cbz x0, .LBB1_3
+; CHECK-NEXT: // %bb.1: // %while_cond.preheader
+; CHECK-NEXT: mov w9, #40000
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: add x9, x0, x9
+; CHECK-NEXT: cmp w8, w1
+; CHECK-NEXT: b.ge .LBB1_3
+; CHECK-NEXT: .LBB1_2: // %while_body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: str w8, [x9, #4]
+; CHECK-NEXT: add w8, w8, #1
+; CHECK-NEXT: str w8, [x9]
+; CHECK-NEXT: cmp w8, w1
+; CHECK-NEXT: b.lt .LBB1_2
+; CHECK-NEXT: .LBB1_3: // %while_end
+; CHECK-NEXT: ret
entry:
%cmp = icmp eq %struct_type* %struct, null
br i1 %cmp, label %while_end, label %while_cond
while_cond:
%phi = phi i32 [ 0, %entry ], [ %i, %while_body ]
-; CHECK: mov w{{[0-9]+}}, #40000
-; CHECK-NOT: mov w{{[0-9]+}}, #40004
%gep0 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 1
%gep1 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 2
%cmp1 = icmp slt i32 %phi, %n
br i1 %cmp1, label %while_body, label %while_end
while_body:
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #4]
%i = add i32 %phi, 1
store i32 %i, i32* %gep0
store i32 %phi, i32* %gep1
@@ -55,7 +83,26 @@ while_end:
}
define void @test3(%struct_type* %s1, %struct_type* %s2, i1 %cond, i32 %n) {
-; CHECK-LABEL: test3
+; CHECK-LABEL: test3:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: tst w2, #0x1
+; CHECK-NEXT: csel x9, x1, x0, ne
+; CHECK-NEXT: cbz x9, .LBB2_3
+; CHECK-NEXT: // %bb.1: // %while_cond.preheader
+; CHECK-NEXT: mov w10, #40000
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: add x9, x9, x10
+; CHECK-NEXT: cmp w8, w3
+; CHECK-NEXT: b.ge .LBB2_3
+; CHECK-NEXT: .LBB2_2: // %while_body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: str w8, [x9, #4]
+; CHECK-NEXT: add w8, w8, #1
+; CHECK-NEXT: str w8, [x9]
+; CHECK-NEXT: cmp w8, w3
+; CHECK-NEXT: b.lt .LBB2_2
+; CHECK-NEXT: .LBB2_3: // %while_end
+; CHECK-NEXT: ret
entry:
br i1 %cond, label %if_true, label %if_end
@@ -69,15 +116,12 @@ if_end:
while_cond:
%phi = phi i32 [ 0, %if_end ], [ %i, %while_body ]
-; CHECK: mov w{{[0-9]+}}, #40000
-; CHECK-NOT: mov w{{[0-9]+}}, #40004
%gep0 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 1
%gep1 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 2
%cmp1 = icmp slt i32 %phi, %n
br i1 %cmp1, label %while_body, label %while_end
while_body:
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #4]
%i = add i32 %phi, 1
store i32 %i, i32* %gep0
store i32 %phi, i32* %gep1
@@ -91,7 +135,49 @@ declare %struct_type* @foo()
declare void @foo2()
define void @test4(i32 %n) personality i32 (...)* @__FrameHandler {
-; CHECK-LABEL: test4
+; CHECK-LABEL: test4:
+; CHECK: .Lfunc_begin0:
+; CHECK-NEXT: .cfi_startproc
+; CHECK-NEXT: .cfi_personality 0, __FrameHandler
+; CHECK-NEXT: .cfi_lsda 0, .Lexception0
+; CHECK-NEXT: // %bb.0: // %entry
+; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 32
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w20, -16
+; CHECK-NEXT: .cfi_offset w21, -24
+; CHECK-NEXT: .cfi_offset w30, -32
+; CHECK-NEXT: mov w19, w0
+; CHECK-NEXT: mov w20, wzr
+; CHECK-NEXT: mov w21, #40000
+; CHECK-NEXT: .LBB3_1: // %while_cond
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: .Ltmp0:
+; CHECK-NEXT: bl foo
+; CHECK-NEXT: .Ltmp1:
+; CHECK-NEXT: // %bb.2: // %while_cond_x.split
+; CHECK-NEXT: // in Loop: Header=BB3_1 Depth=1
+; CHECK-NEXT: add x8, x0, x21
+; CHECK-NEXT: cmp w20, w19
+; CHECK-NEXT: str wzr, [x8]
+; CHECK-NEXT: b.ge .LBB3_4
+; CHECK-NEXT: // %bb.3: // %while_body
+; CHECK-NEXT: // in Loop: Header=BB3_1 Depth=1
+; CHECK-NEXT: str w20, [x8, #4]
+; CHECK-NEXT: add w20, w20, #1
+; CHECK-NEXT: str w20, [x8]
+; CHECK-NEXT: b .LBB3_1
+; CHECK-NEXT: .LBB3_4: // %while_end
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB3_5: // %cleanup
+; CHECK-NEXT: .Ltmp2:
+; CHECK-NEXT: mov x19, x0
+; CHECK-NEXT: bl foo2
+; CHECK-NEXT: mov x0, x19
+; CHECK-NEXT: bl _Unwind_Resume
entry:
br label %while_cond
@@ -100,8 +186,6 @@ while_cond:
%struct = invoke %struct_type* @foo() to label %while_cond_x unwind label %cleanup
while_cond_x:
-; CHECK: mov w{{[0-9]+}}, #40000
-; CHECK-NOT: mov w{{[0-9]+}}, #40004
%gep0 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 1
%gep1 = getelementptr %struct_type, %struct_type* %struct, i64 0, i32 2
store i32 0, i32* %gep0
@@ -109,7 +193,6 @@ while_cond_x:
br i1 %cmp, label %while_body, label %while_end
while_body:
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #4]
%i = add i32 %phi, 1
store i32 %i, i32* %gep0
store i32 %phi, i32* %gep1
@@ -128,22 +211,36 @@ cleanup:
declare i32 @__FrameHandler(...)
define void @test5([65536 x i32]** %s, i32 %n) {
-; CHECK-LABEL: test5
+; CHECK-LABEL: test5:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr x9, [x0]
+; CHECK-NEXT: mov w10, #14464
+; CHECK-NEXT: movk w10, #1, lsl #16
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: add x9, x9, x10
+; CHECK-NEXT: cmp w8, w1
+; CHECK-NEXT: b.ge .LBB4_2
+; CHECK-NEXT: .LBB4_1: // %while_body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: str w8, [x9, #4]
+; CHECK-NEXT: add w8, w8, #1
+; CHECK-NEXT: str w8, [x9]
+; CHECK-NEXT: cmp w8, w1
+; CHECK-NEXT: b.lt .LBB4_1
+; CHECK-NEXT: .LBB4_2: // %while_end
+; CHECK-NEXT: ret
entry:
%struct = load [65536 x i32]*, [65536 x i32]** %s
br label %while_cond
while_cond:
%phi = phi i32 [ 0, %entry ], [ %i, %while_body ]
-; CHECK: mov w{{[0-9]+}}, #14464
-; CHECK-NOT: mov w{{[0-9]+}}, #14468
%gep0 = getelementptr [65536 x i32], [65536 x i32]* %struct, i64 0, i32 20000
%gep1 = getelementptr [65536 x i32], [65536 x i32]* %struct, i64 0, i32 20001
%cmp = icmp slt i32 %phi, %n
br i1 %cmp, label %while_body, label %while_end
while_body:
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #4]
%i = add i32 %phi, 1
store i32 %i, i32* %gep0
store i32 %phi, i32* %gep1
@@ -156,7 +253,19 @@ while_end:
declare i8* @llvm.strip.invariant.group.p0i8(i8*)
define void @test_invariant_group(i32) {
-; CHECK-LABEL: test_invariant_group
+; CHECK-LABEL: test_invariant_group:
+; CHECK: // %bb.0:
+; CHECK-NEXT: cbz wzr, .LBB5_2
+; CHECK-NEXT: // %bb.1:
+; CHECK-NEXT: cbz w0, .LBB5_3
+; CHECK-NEXT: .LBB5_2:
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB5_3:
+; CHECK-NEXT: cbnz wzr, .LBB5_2
+; CHECK-NEXT: // %bb.4:
+; CHECK-NEXT: mov w8, #1
+; CHECK-NEXT: str x8, [x8]
+; CHECK-NEXT: ret
br i1 undef, label %8, label %7
; <label>:2: ; preds = %8, %2
diff --git a/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-pre-inc-offset-check.ll b/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-pre-inc-offset-check.ll
index 5c1cb2197bda4..44446eadfaefc 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-pre-inc-offset-check.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-pre-inc-offset-check.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-none-eabi -lsr-preferred-addressing-mode=preindexed %s -o - | FileCheck %s
; In LSR for constant offsets and steps, we can generate pre-inc
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