[PATCH] D111135: [AArch64][SVE] Improve VECTOR_SPLICE codegen for VL > 128-bit

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll:37-38
 ; CHECK-NEXT:    mov x8, sp
-; CHECK-NEXT:    mov w10, #16
-; CHECK-NEXT:    cmp x9, #16
+; CHECK-NEXT:    mov w10, #256
+; CHECK-NEXT:    cmp x9, #256
 ; CHECK-NEXT:    st1b { z0.b }, p0, [sp]
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paulwalker-arm wrote:
> Is this safe? You've not touched this code so I've got a feeling the common expand code is incorrectly assuming the largest legal index+1 represents a safe index to use when expanding the code.  I think it is safer to force an out-of-range index to `0`.
Please ignore this. I didn't spot the ll test change and so got my wires crossed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111135/new/

https://reviews.llvm.org/D111135