[PATCH] D110858: [PowerPC] Implement vector float and vector double version for vec_orc builtin
Albion Fung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 6 00:48:13 PDT 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG13d3cd37e278: [PowerPC] Implement vector float and vector double version for vec_orc builtin (authored by Conanap).
Changed prior to commit:
https://reviews.llvm.org/D110858?vs=376273&id=377453#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110858/new/
https://reviews.llvm.org/D110858
Files:
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-p8vector.c
Index: clang/test/CodeGen/builtins-ppc-p8vector.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-p8vector.c
+++ clang/test/CodeGen/builtins-ppc-p8vector.c
@@ -35,7 +35,9 @@
vector unsigned __int128 vux = { 1 };
vector float vfa = { 1.e-4f, -132.23f, -22.1, 32.00f };
+vector float vfb = { 1.e-4f, -132.23f, -22.1, 32.00f };
vector double vda = { 1.e-11, -132.23e10 };
+vector double vdb = { 1.e-11, -132.23e10 };
int res_i;
double res_d;
@@ -1067,6 +1069,12 @@
// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: or <4 x i32> {{%.+}}, [[T1]]
// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
+// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
+
+ res_vf = vec_orc(vfa, vfb);
+// CHECK: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
+// CHECK: or <4 x i32> {{%.+}}, [[T1]]
+// CHECK-LE: [[T1:%.+]] = xor <4 x i32> {{%.+}}, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK-LE: or <4 x i32> {{%.+}}, [[T1]]
res_vsll = vec_orc(vsll, vsll);
@@ -1121,6 +1129,12 @@
// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
// CHECK: or <2 x i64> {{%.+}}, [[T1]]
// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
+// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]]
+
+ res_vd = vec_orc(vda, vdb);
+// CHECK: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
+// CHECK: or <2 x i64> {{%.+}}, [[T1]]
+// CHECK-LE: [[T1:%.+]] = xor <2 x i64> {{%.+}}, <i64 -1, i64 -1>
// CHECK-LE: or <2 x i64> {{%.+}}, [[T1]]
/* vec_sub */
Index: clang/lib/Headers/altivec.h
===================================================================
--- clang/lib/Headers/altivec.h
+++ clang/lib/Headers/altivec.h
@@ -7109,6 +7109,11 @@
return (vector float)((vector unsigned int)__a | ~__b);
}
+static __inline__ vector float __ATTRS_o_ai vec_orc(vector float __a,
+ vector float __b) {
+ return (vector float)((vector unsigned int)__a | ~(vector unsigned int)__b);
+}
+
static __inline__ vector signed long long __ATTRS_o_ai
vec_orc(vector signed long long __a, vector signed long long __b) {
return __a | ~__b;
@@ -7153,6 +7158,12 @@
vec_orc(vector bool long long __a, vector double __b) {
return (vector double)(__a | ~(vector unsigned long long)__b);
}
+
+static __inline__ vector double __ATTRS_o_ai vec_orc(vector double __a,
+ vector double __b) {
+ return (vector double)((vector bool long long)__a |
+ ~(vector unsigned long long)__b);
+}
#endif
/* vec_vor */
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