[PATCH] D111188: [ARM] Fix a bug in finding a pair of extracts to create VMOVRRD

[Pengxuan Zheng via Phabricator via llvm-commits]

pzheng created this revision.
pzheng added reviewers: dmgreen, efriedma, apazos, SjoerdMeijer, simon_tatham, ostannard, NickGuy.
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D100244 <https://reviews.llvm.org/D100244> missed a check on the ResNo of the extract's operand 0 when finding a
pair of extracts to combine into a VMOVRRD (extract(x, n); extract(x, n+1) ->
VMOVRRD(extract x, n/2)). As a result, it can incorrectly pair an extract(x, n)
with another extract(x:3, n+1) for example. This patch fixes the bug by adding
the proper check on ResNo.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111188

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/ARM/vector-extract.ll


Index: llvm/test/CodeGen/ARM/vector-extract.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/ARM/vector-extract.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
+
+; Check that the two extracts are not combined into a vmov.
+
+%struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
+
+define i32 @vld4Qi32(i32* %A) nounwind {
+;CHECK-LABEL: vld4Qi32:
+;CHECK: vmov.32
+        %tmp0 = bitcast i32* %A to i8*
+        %tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32.p0i8(i8* %tmp0, i32 1)
+        %tmp2 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 0
+        %tmp3 = extractelement <4 x i32> %tmp2, i32 0
+        %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 1
+        %tmp5 = extractelement <4 x i32> %tmp4, i32 1
+        %tmp6 = add i32 %tmp3, %tmp5
+        ret i32 %tmp6
+}
+
+declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32.p0i8(i8*, i32) nounwind readonly
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -14968,6 +14968,7 @@
 
   SDValue Op0 = Ext.getOperand(0);
   EVT VecVT = Op0.getValueType();
+  unsigned ResNo = Op0.getResNo();
   unsigned Lane = Ext.getConstantOperandVal(1);
   if (VecVT.getVectorNumElements() != 4)
     return SDValue();
@@ -14976,7 +14977,8 @@
   auto OtherIt = find_if(Op0->uses(), [&](SDNode *V) {
     return V->getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
            isa<ConstantSDNode>(V->getOperand(1)) &&
-           V->getConstantOperandVal(1) == Lane + 1;
+           V->getConstantOperandVal(1) == Lane + 1 &&
+           V->getOperand(0).getResNo() == ResNo;
   });
   if (OtherIt == Op0->uses().end())
     return SDValue();


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