[PATCH] D110557: [X86] Optimize fdiv with reciprocal instructions for half type

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:23187
+      SDValue Undef = DAG.getUNDEF(MVT::v8f16);
+      Op = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v8f16, Undef, Op, Zero);
+      Op = DAG.getNode(X86ISD::RSQRT14S, DL, MVT::v8f16, Undef, Op);
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This is a SCALAR_TO_VECTOR node


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:23236
+      SDValue Undef = DAG.getUNDEF(MVT::v8f16);
+      Op = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v8f16, Undef, Op, Zero);
+      Op = DAG.getNode(X86ISD::RCP14S, DL, MVT::v8f16, Undef, Op);
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SCALAR_TO_VECTOR 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110557/new/

https://reviews.llvm.org/D110557