[PATCH] D111073: [X86][Costmodel] Load/store i64/f64 Stride=4 VF=2 interleaving costs
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 5 06:59:59 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGdcc2b0d9336c: [X86][Costmodel] Load/store i64/f64 Stride=4 VF=2 interleaving costs (authored by lebedev.ri).
Changed prior to commit:
https://reviews.llvm.org/D111073?vs=376927&id=377211#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111073/new/
https://reviews.llvm.org/D111073
Files:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
@@ -22,7 +22,7 @@
; AVX1: LV: Found an estimated cost of 104 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v3, i64* %out3, align 8
-; AVX2: LV: Found an estimated cost of 22 for VF 2 For instruction: store i64 %v3, i64* %out3, align 8
+; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: store i64 %v3, i64* %out3, align 8
; AVX2: LV: Found an estimated cost of 52 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8
; AVX2: LV: Found an estimated cost of 104 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8
;
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
@@ -22,7 +22,7 @@
; AVX1: LV: Found an estimated cost of 64 for VF 8 For instruction: store double %v3, double* %out3, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v3, double* %out3, align 8
-; AVX2: LV: Found an estimated cost of 12 for VF 2 For instruction: store double %v3, double* %out3, align 8
+; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: store double %v3, double* %out3, align 8
; AVX2: LV: Found an estimated cost of 32 for VF 4 For instruction: store double %v3, double* %out3, align 8
; AVX2: LV: Found an estimated cost of 64 for VF 8 For instruction: store double %v3, double* %out3, align 8
;
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
@@ -22,7 +22,7 @@
; AVX1: LV: Found an estimated cost of 104 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 22 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 52 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 104 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
;
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
@@ -22,7 +22,7 @@
; AVX1: LV: Found an estimated cost of 64 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 14 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 32 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 64 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
;
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5133,6 +5133,8 @@
{4, MVT::v8i32, 16}, // (load 32i32 and) deinterleave into 4 x 8i32
{4, MVT::v16i32, 32}, // (load 64i32 and) deinterleave into 4 x 16i32
+ {4, MVT::v2i64, 6}, // (load 8i64 and) deinterleave into 4 x 2i64
+
{6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8
{6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8
{6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8
@@ -5210,6 +5212,8 @@
{4, MVT::v8i32, 16}, // interleave 4 x 8i32 into 32i32 (and store)
{4, MVT::v16i32, 32}, // interleave 4 x 16i32 into 64i32 (and store)
+ {4, MVT::v2i64, 6}, // interleave 4 x 2i64 into 8i64 (and store)
+
{6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store)
{6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store)
{6, MVT::v8i8, 16}, // interleave 6 x 8i8 into 48i8 (and store)
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