[llvm] 758ea6c - [RISCV] Add riscv64 command line to hoist-global-addr-base.ll. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-10-04T17:01:59-07:00
New Revision: 758ea6c03e466ca9035392f26941bd7524cfbdc6

URL: https://github.com/llvm/llvm-project/commit/758ea6c03e466ca9035392f26941bd7524cfbdc6
DIFF: https://github.com/llvm/llvm-project/commit/758ea6c03e466ca9035392f26941bd7524cfbdc6.diff

LOG: [RISCV] Add riscv64 command line to hoist-global-addr-base.ll. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll b/llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
index fbfa7ce9dbb33..6521ea26d7053 100644
--- a/llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
+++ b/llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv32  < %s | FileCheck  %s
+; RUN: llc -mtriple=riscv32  < %s | FileCheck  %s --check-prefixes=CHECK,RV32
+; RUN: llc -mtriple=riscv64  < %s | FileCheck  %s --check-prefixes=CHECK,RV64
 
 %struct.S = type { [40 x i32], i32, i32, i32, [4100 x i32], i32, i32, i32 }
 @s = common dso_local global %struct.S zeroinitializer, align 4
@@ -57,11 +58,20 @@ if.end:                                           ; preds = %if.then, %entry
 ; addi a0, a0, -160
 ; add  a0, a0, a1  ---> base + offset.
 define i8* @big_offset_neg_addi() nounwind {
-; CHECK-LABEL: big_offset_neg_addi:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    lui a0, %hi(g+73568)
-; CHECK-NEXT:    addi a0, a0, %lo(g+73568)
-; CHECK-NEXT:    ret
+; RV32-LABEL: big_offset_neg_addi:
+; RV32:       # %bb.0:
+; RV32-NEXT:    lui a0, %hi(g+73568)
+; RV32-NEXT:    addi a0, a0, %lo(g+73568)
+; RV32-NEXT:    ret
+;
+; RV64-LABEL: big_offset_neg_addi:
+; RV64:       # %bb.0:
+; RV64-NEXT:    lui a0, %hi(g)
+; RV64-NEXT:    addi a0, a0, %lo(g)
+; RV64-NEXT:    lui a1, 18
+; RV64-NEXT:    addiw a1, a1, -160
+; RV64-NEXT:    add a0, a0, a1
+; RV64-NEXT:    ret
   ret i8* getelementptr inbounds ([1048576 x i8], [1048576 x i8]* @g, i32 0, i32 73568)
 }
 
@@ -81,11 +91,20 @@ define i8* @big_offset_lui_tail() nounwind {
 }
 
 define dso_local i32* @big_offset_one_use() local_unnamed_addr nounwind {
-; CHECK-LABEL: big_offset_one_use:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lui a0, %hi(s+16572)
-; CHECK-NEXT:    addi a0, a0, %lo(s+16572)
-; CHECK-NEXT:    ret
+; RV32-LABEL: big_offset_one_use:
+; RV32:       # %bb.0: # %entry
+; RV32-NEXT:    lui a0, %hi(s+16572)
+; RV32-NEXT:    addi a0, a0, %lo(s+16572)
+; RV32-NEXT:    ret
+;
+; RV64-LABEL: big_offset_one_use:
+; RV64:       # %bb.0: # %entry
+; RV64-NEXT:    lui a0, 4
+; RV64-NEXT:    addiw a0, a0, 188
+; RV64-NEXT:    lui a1, %hi(s)
+; RV64-NEXT:    addi a1, a1, %lo(s)
+; RV64-NEXT:    add a0, a1, a0
+; RV64-NEXT:    ret
 entry:
   ret i32* getelementptr inbounds (%struct.S, %struct.S* @s, i32 0, i32 5)
 }
@@ -124,21 +143,37 @@ if.end:                                           ; preds = %if.then, %entry
 }
 
 define dso_local i32 @load_half() nounwind {
-; CHECK-LABEL: load_half:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addi sp, sp, -16
-; CHECK-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-NEXT:    lui a0, %hi(foo+8)
-; CHECK-NEXT:    lhu a0, %lo(foo+8)(a0)
-; CHECK-NEXT:    addi a1, zero, 140
-; CHECK-NEXT:    bne a0, a1, .LBB7_2
-; CHECK-NEXT:  # %bb.1: # %if.end
-; CHECK-NEXT:    mv a0, zero
-; CHECK-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-NEXT:    addi sp, sp, 16
-; CHECK-NEXT:    ret
-; CHECK-NEXT:  .LBB7_2: # %if.then
-; CHECK-NEXT:    call abort at plt
+; RV32-LABEL: load_half:
+; RV32:       # %bb.0: # %entry
+; RV32-NEXT:    addi sp, sp, -16
+; RV32-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
+; RV32-NEXT:    lui a0, %hi(foo+8)
+; RV32-NEXT:    lhu a0, %lo(foo+8)(a0)
+; RV32-NEXT:    addi a1, zero, 140
+; RV32-NEXT:    bne a0, a1, .LBB7_2
+; RV32-NEXT:  # %bb.1: # %if.end
+; RV32-NEXT:    mv a0, zero
+; RV32-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
+; RV32-NEXT:    addi sp, sp, 16
+; RV32-NEXT:    ret
+; RV32-NEXT:  .LBB7_2: # %if.then
+; RV32-NEXT:    call abort at plt
+;
+; RV64-LABEL: load_half:
+; RV64:       # %bb.0: # %entry
+; RV64-NEXT:    addi sp, sp, -16
+; RV64-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
+; RV64-NEXT:    lui a0, %hi(foo+8)
+; RV64-NEXT:    lhu a0, %lo(foo+8)(a0)
+; RV64-NEXT:    addi a1, zero, 140
+; RV64-NEXT:    bne a0, a1, .LBB7_2
+; RV64-NEXT:  # %bb.1: # %if.end
+; RV64-NEXT:    mv a0, zero
+; RV64-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
+; RV64-NEXT:    addi sp, sp, 16
+; RV64-NEXT:    ret
+; RV64-NEXT:  .LBB7_2: # %if.then
+; RV64-NEXT:    call abort at plt
 entry:
   %0 = load i16, i16* getelementptr inbounds ([6 x i16], [6 x i16]* @foo, i32 0, i32 4), align 2
   %cmp = icmp eq i16 %0, 140