[PATCH] D79794: Change the INLINEASM_BR MachineInstr to be a non-terminating instruction.

[Bill Wendling via Phabricator via llvm-commits]

void added a comment.

In D79794#3040491 <https://reviews.llvm.org/D79794#3040491>, @MatzeB wrote:

> So effectively we have an extended basic-block model in the LLVM backend now (blocks have 1 entry, but multiple exits that can be in the middle of the block). I know this was already the case for exception control-flow, but this here cemented it further. With that not being documented anywhere, and being different from LLVM IR/middleend, we are probably asking for trouble...

Not really. The LLVM IR still treats a `callbr` as a terminator. It's the MIR that can accept it as a non-terminator. We took great pains to ensure that nothing could be moved past it, so that the semantics won't change and we can reload registers, etc.. Not being able to 100% model the control flow of an assembly block already existed with current assembly blocks. There's no guarantee that a given assembly block won't have branches, or loops, or calls, or exits. None of which is modeled in MIR.


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  https://reviews.llvm.org/D79794/new/

https://reviews.llvm.org/D79794