[PATCH] D110830: [AArch64] Make -mcpu=generic schedule for an in-order core

Mon Oct 4 06:37:43 PDT 2021

dmgreen added a comment.

In D110830#3039566 <https://reviews.llvm.org/D110830#3039566>, @kristof.beyls wrote:

> For speculation-hardening-sls.ll: the approach taken in the ARM backend version of the similar test is probably a lot more robust, and I'd guess that if the test was adapted to follow the approach there ( see https://github.com/llvm/llvm-project/blob/566690b067c8175314fa657b899c99bccf96821c/llvm/test/CodeGen/ARM/speculation-hardening-sls.ll#L343), the compiler would still use the x16 register.

Thanks for the suggestion, I will take a look.

On a side note, it looks like llvm/test/CodeGen/ARM/speculation-hardening-sls.ll doesn't contain many of the check lines I would expect any more, after e497b12a69604b6d691312a30f6b86da4f18f7f8 <https://reviews.llvm.org/rGe497b12a69604b6d691312a30f6b86da4f18f7f8>. Is that expected, or should I make a patch to undo that?

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https://reviews.llvm.org/D110830