[PATCH] D111027: [X86][Costmodel] Load/store i64/f64 Stride=3 VF=8 interleaving costs
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 4 04:42:00 PDT 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rGede0611e792c: [X86][Costmodel] Load/store i64/f64 Stride=3 VF=8 interleaving costs (authored by lebedev.ri).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111027/new/
https://reviews.llvm.org/D111027
Files:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v2, i64* %out2, align 8
; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store i64 %v2, i64* %out2, align 8
; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction: store i64 %v2, i64* %out2, align 8
-; AVX2: LV: Found an estimated cost of 78 for VF 8 For instruction: store i64 %v2, i64* %out2, align 8
+; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction: store i64 %v2, i64* %out2, align 8
; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction: store i64 %v2, i64* %out2, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v2, i64* %out2, align 8
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v2, double* %out2, align 8
; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store double %v2, double* %out2, align 8
; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction: store double %v2, double* %out2, align 8
-; AVX2: LV: Found an estimated cost of 54 for VF 8 For instruction: store double %v2, double* %out2, align 8
+; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction: store double %v2, double* %out2, align 8
; AVX2: LV: Found an estimated cost of 108 for VF 16 For instruction: store double %v2, double* %out2, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v2, double* %out2, align 8
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 78 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 16 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 48 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 16 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 96 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5113,6 +5113,7 @@
{3, MVT::v2i64, 1}, // (load 6i64 and) deinterleave into 3 x 2i64
{3, MVT::v4i64, 5}, // (load 12i64 and) deinterleave into 3 x 4i64
+ {3, MVT::v8i64, 10}, // (load 24i64 and) deinterleave into 3 x 8i64
{4, MVT::v2i8, 4}, // (load 8i8 and) deinterleave into 4 x 2i8
{4, MVT::v4i8, 4}, // (load 16i8 and) deinterleave into 4 x 4i8
@@ -5183,6 +5184,7 @@
{3, MVT::v2i64, 4}, // interleave 3 x 2i64 into 6i64 (and store)
{3, MVT::v4i64, 6}, // interleave 3 x 4i64 into 12i64 (and store)
+ {3, MVT::v8i64, 12}, // interleave 3 x 8i64 into 24i64 (and store)
{4, MVT::v2i8, 4}, // interleave 4 x 2i8 into 8i8 (and store)
{4, MVT::v4i8, 4}, // interleave 4 x 4i8 into 16i8 (and store)
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