[llvm] 198aa84 - [X86][Costmodel] Load/store i32/f32 Stride=3 VF=8 interleaving costs
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 4 04:41:12 PDT 2021
Author: Roman Lebedev
Date: 2021-10-04T14:34:05+03:00
New Revision: 198aa84973e6d5f9cdc7b241c4dc9880d63a5b5c
URL: https://github.com/llvm/llvm-project/commit/198aa84973e6d5f9cdc7b241c4dc9880d63a5b5c
DIFF: https://github.com/llvm/llvm-project/commit/198aa84973e6d5f9cdc7b241c4dc9880d63a5b5c.diff
LOG: [X86][Costmodel] Load/store i32/f32 Stride=3 VF=8 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/zdz5Ga6fs - for intels `Block RThroughput: =7.0`; for ryzens, `Block RThroughput: <=6.0`
So pick cost of `7`.
For store we have:
https://godbolt.org/z/qn71513ac - for intels `Block RThroughput: =11.0`; for ryzens, `Block RThroughput: <=8.0`
So pick cost of `11`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D111021
Added:
Modified:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 750e67d6da43..72fde3d6299d 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5108,7 +5108,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{3, MVT::v2i32, 3}, // (load 6i32 and) deinterleave into 3 x 2i32
{3, MVT::v4i32, 3}, // (load 12i32 and) deinterleave into 3 x 4i32
- {3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
+ {3, MVT::v8i32, 7}, // (load 24i32 and) deinterleave into 3 x 8i32
{4, MVT::v2i8, 4}, // (load 8i8 and) deinterleave into 4 x 2i8
{4, MVT::v4i8, 4}, // (load 16i8 and) deinterleave into 4 x 4i8
@@ -5174,6 +5174,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{3, MVT::v2i32, 4}, // interleave 3 x 2i32 into 6i32 (and store)
{3, MVT::v4i32, 5}, // interleave 3 x 4i32 into 12i32 (and store)
+ {3, MVT::v8i32, 11}, // interleave 3 x 8i32 into 24i32 (and store)
{4, MVT::v2i8, 4}, // interleave 4 x 2i8 into 8i8 (and store)
{4, MVT::v4i8, 4}, // interleave 4 x 4i8 into 16i8 (and store)
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
index 3997ddb56d95..d256adc8231c 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
@@ -26,7 +26,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 10 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll
index 373a55d7ad48..10a16b3ca009 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll
@@ -93,49 +93,3 @@ for.body: ; preds = %for.body.lr.ph, %fo
%cmp = icmp slt i32 %add46, %width_
br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
}
-
-; Function Attrs: norecurse nounwind
-define void @stride3(float %k, i32 %width_) {
-entry:
-
-; CHECK: Found an estimated cost of 20 for VF 8 For instruction: %0 = load float
-
- %cmp27 = icmp sgt i32 %width_, 0
- br i1 %cmp27, label %for.body.lr.ph, label %for.cond.cleanup
-
-for.body.lr.ph: ; preds = %entry
- br label %for.body
-
-for.cond.cleanup: ; preds = %for.body, %entry
- ret void
-
-for.body: ; preds = %for.body.lr.ph, %for.body
- %i.028 = phi i32 [ 0, %for.body.lr.ph ], [ %add16, %for.body ]
- %arrayidx = getelementptr inbounds [120 x float], [120 x float]* @src, i32 0, i32 %i.028
- %0 = load float, float* %arrayidx, align 4
- %mul = fmul fast float %0, %k
- %arrayidx2 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %i.028
- %1 = load float, float* %arrayidx2, align 4
- %add3 = fadd fast float %1, %mul
- store float %add3, float* %arrayidx2, align 4
- %add4 = add nuw nsw i32 %i.028, 1
- %arrayidx5 = getelementptr inbounds [120 x float], [120 x float]* @src, i32 0, i32 %add4
- %2 = load float, float* %arrayidx5, align 4
- %mul6 = fmul fast float %2, %k
- %arrayidx8 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %add4
- %3 = load float, float* %arrayidx8, align 4
- %add9 = fadd fast float %3, %mul6
- store float %add9, float* %arrayidx8, align 4
- %add10 = add nuw nsw i32 %i.028, 2
- %arrayidx11 = getelementptr inbounds [120 x float], [120 x float]* @src, i32 0, i32 %add10
- %4 = load float, float* %arrayidx11, align 4
- %mul12 = fmul fast float %4, %k
- %arrayidx14 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %add10
- %5 = load float, float* %arrayidx14, align 4
- %add15 = fadd fast float %5, %mul12
- store float %add15, float* %arrayidx14, align 4
- %add16 = add nuw nsw i32 %i.028, 3
- %cmp = icmp slt i32 %add16, %width_
- br i1 %cmp, label %for.body, label %for.cond.cleanup
-}
-
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
index 93d6dfc10243..6f3ebb6b7940 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
@@ -26,7 +26,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 10 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
index a2b5d7c3bf4e..941b31e244f4 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
@@ -26,7 +26,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v2, float* %out2, align 4
; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction: store float %v2, float* %out2, align 4
; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction: store float %v2, float* %out2, align 4
-; AVX2: LV: Found an estimated cost of 57 for VF 8 For instruction: store float %v2, float* %out2, align 4
+; AVX2: LV: Found an estimated cost of 14 for VF 8 For instruction: store float %v2, float* %out2, align 4
; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction: store float %v2, float* %out2, align 4
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v2, float* %out2, align 4
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
index 9d8625497314..7c9a470b37d4 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
@@ -26,7 +26,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v2, i32* %out2, align 4
; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction: store i32 %v2, i32* %out2, align 4
; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction: store i32 %v2, i32* %out2, align 4
-; AVX2: LV: Found an estimated cost of 69 for VF 8 For instruction: store i32 %v2, i32* %out2, align 4
+; AVX2: LV: Found an estimated cost of 14 for VF 8 For instruction: store i32 %v2, i32* %out2, align 4
; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction: store i32 %v2, i32* %out2, align 4
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v2, i32* %out2, align 4
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