[llvm] 67f1ee2 - [X86][Costmodel] Load/store i16 Stride=3 VF=32 interleaving costs

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2021-10-03T23:40:35+03:00
New Revision: 67f1ee2e38e83af34b58e3873bd4ba6dec7f5c50

URL: https://github.com/llvm/llvm-project/commit/67f1ee2e38e83af34b58e3873bd4ba6dec7f5c50
DIFF: https://github.com/llvm/llvm-project/commit/67f1ee2e38e83af34b58e3873bd4ba6dec7f5c50.diff

LOG: [X86][Costmodel] Load/store i16 Stride=3 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/rMaYr67hz - for intels `Block RThroughput: =56.0`; for ryzens, `Block RThroughput: <=17.8`
So pick cost of `56`.

For store we have:
https://godbolt.org/z/eMsbKqnvv - for intels `Block RThroughput: <=54.0`; for ryzens, `Block RThroughput: <=15.0`
So pick cost of `54`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111018

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
    llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 45eb4b288f47..5c47cbcddc7f 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5104,6 +5104,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
       {3, MVT::v4i16, 7},  // (load 12i16 and) deinterleave into 3 x 4i16
       {3, MVT::v8i16, 9},  // (load 24i16 and) deinterleave into 3 x 8i16
       {3, MVT::v16i16, 28},  // (load 48i16 and) deinterleave into 3 x 16i16
+      {3, MVT::v32i16, 56},  // (load 96i16 and) deinterleave into 3 x 32i16
 
       {3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
 
@@ -5167,6 +5168,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
       {3, MVT::v4i16, 6},   // interleave 3 x 4i16 into 12i16 (and store)
       {3, MVT::v8i16, 12},   // interleave 3 x 8i16 into 24i16 (and store)
       {3, MVT::v16i16, 27},   // interleave 3 x 16i16 into 48i16 (and store)
+      {3, MVT::v32i16, 54},   // interleave 3 x 32i16 into 96i16 (and store)
 
       {4, MVT::v2i8, 4},  // interleave 4 x 2i8 into 8i8 (and store)
       {4, MVT::v4i8, 4},   // interleave 4 x 4i8 into 16i8 (and store)

diff  --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
index 4c72a9df9b6b..08480bd0dc5f 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
@@ -30,7 +30,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; AVX2: LV: Found an estimated cost of 11 for VF 8 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; AVX2: LV: Found an estimated cost of 31 for VF 16 For instruction:   %v0 = load i16, i16* %in0, align 2
-; AVX2: LV: Found an estimated cost of 258 for VF 32 For instruction:   %v0 = load i16, i16* %in0, align 2
+; AVX2: LV: Found an estimated cost of 62 for VF 32 For instruction:   %v0 = load i16, i16* %in0, align 2
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load i16, i16* %in0, align 2

diff  --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
index 74246c8d2de9..2e52bb102bea 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
@@ -30,7 +30,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction:   store i16 %v2, i16* %out2, align 2
 ; AVX2: LV: Found an estimated cost of 14 for VF 8 For instruction:   store i16 %v2, i16* %out2, align 2
 ; AVX2: LV: Found an estimated cost of 30 for VF 16 For instruction:   store i16 %v2, i16* %out2, align 2
-; AVX2: LV: Found an estimated cost of 258 for VF 32 For instruction:   store i16 %v2, i16* %out2, align 2
+; AVX2: LV: Found an estimated cost of 60 for VF 32 For instruction:   store i16 %v2, i16* %out2, align 2
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i16 %v2, i16* %out2, align 2
 ; AVX512: LV: Found an estimated cost of 6 for VF 2 For instruction:   store i16 %v2, i16* %out2, align 2