[PATCH] D111029: [X86] Prefer 512-bit vectors on Ice/Rocket/TigerLake (PR48336)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: pengfei, craig.topper, pcordes.
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This patch proposes we drop the TuningPrefer256Bit tuning flag on IceLake and later.

It doesn't appear that IceLake and later CPUs have the drastic frequency scaling issues with 512-bit vector usage, unlike earlier AVX512-capable targets: https://travisdowns.github.io/blog/2020/08/19/icl-avx512-freq.html

I'm uncertain if there are any locations in the source that need to kept in sync with this change, but I didn't find anything in a brief search.

I'm open to suggestions on additional test coverage, we have tried to make new costmodel/vectorizer tests to be attribute based instead of specifying cpus but it might be useful to add some -mcpu=icelake coverage here?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111029

Files:
  llvm/lib/Target/X86/X86.td
  llvm/test/CodeGen/X86/min-legal-vector-width.ll

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