[PATCH] D111007: [TwoAddressInstruction] Enable machine verification after this pass
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 3 01:16:54 PDT 2021
foad created this revision.
Herald added subscribers: mstorsjo, hiraditya.
foad requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D111007
Files:
llvm/lib/CodeGen/TargetPassConfig.cpp
Index: llvm/lib/CodeGen/TargetPassConfig.cpp
===================================================================
--- llvm/lib/CodeGen/TargetPassConfig.cpp
+++ llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -1418,7 +1418,7 @@
/// register allocation. No coalescing or scheduling.
void TargetPassConfig::addFastRegAlloc() {
addPass(&PHIEliminationID);
- addPass(&TwoAddressInstructionPassID, false);
+ addPass(&TwoAddressInstructionPassID);
addRegAssignAndRewriteFast();
}
@@ -1452,7 +1452,7 @@
if (EarlyLiveIntervals)
addPass(&LiveIntervalsID, false);
- addPass(&TwoAddressInstructionPassID, false);
+ addPass(&TwoAddressInstructionPassID);
addPass(&RegisterCoalescerID);
// The machine scheduler may accidentally create disconnected components
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D111007.376745.patch
Type: text/x-patch
Size: 771 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211003/3f186411/attachment.bin>
More information about the llvm-commits
mailing list