[PATCH] D110958: [X86][Costmodel] Load/store i8 Stride=3 VF=4 interleaving costs

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 2 03:52:44 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rGf1df2d8eaf18: [X86][Costmodel] Load/store i8 Stride=3 VF=4 interleaving costs (authored by lebedev.ri).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110958/new/

https://reviews.llvm.org/D110958

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll


Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
@@ -27,7 +27,7 @@
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i8 %v2, i8* %out2, align 1
 ; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction:   store i8 %v2, i8* %out2, align 1
-; AVX2: LV: Found an estimated cost of 11 for VF 4 For instruction:   store i8 %v2, i8* %out2, align 1
+; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction:   store i8 %v2, i8* %out2, align 1
 ; AVX2: LV: Found an estimated cost of 14 for VF 8 For instruction:   store i8 %v2, i8* %out2, align 1
 ; AVX2: LV: Found an estimated cost of 13 for VF 16 For instruction:   store i8 %v2, i8* %out2, align 1
 ; AVX2: LV: Found an estimated cost of 16 for VF 32 For instruction:   store i8 %v2, i8* %out2, align 1
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
@@ -27,7 +27,7 @@
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   %v0 = load i8, i8* %in0, align 1
-; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction:   %v0 = load i8, i8* %in0, align 1
+; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 13 for VF 16 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 16 for VF 32 For instruction:   %v0 = load i8, i8* %in0, align 1
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5087,7 +5087,7 @@
       {2, MVT::v16i64, 16}, // (load 32i64 and) deinterleave into 2 x 16i64
 
       {3, MVT::v2i8, 3},  // (load 6i8 and) deinterleave into 3 x 2i8
-      {3, MVT::v4i8, 4},   // (load 12i8 and) deinterleave into 3 x 4i8
+      {3, MVT::v4i8, 3},   // (load 12i8 and) deinterleave into 3 x 4i8
       {3, MVT::v8i8, 9},   // (load 24i8 and) deinterleave into 3 x 8i8
       {3, MVT::v16i8, 11}, // (load 48i8 and) deinterleave into 3 x 16i8
       {3, MVT::v32i8, 13}, // (load 96i8 and) deinterleave into 3 x 32i8
@@ -5139,7 +5139,7 @@
       {2, MVT::v16i64, 16}, // interleave 2 x 16i64 into 32i64 (and store)
 
       {3, MVT::v2i8, 4},   // interleave 3 x 2i8 into 6i8 (and store)
-      {3, MVT::v4i8, 8},   // interleave 3 x 4i8 into 12i8 (and store)
+      {3, MVT::v4i8, 4},   // interleave 3 x 4i8 into 12i8 (and store)
       {3, MVT::v8i8, 11},  // interleave 3 x 8i8 into 24i8 (and store)
       {3, MVT::v16i8, 11}, // interleave 3 x 16i8 into 48i8 (and store)
       {3, MVT::v32i8, 13}, // interleave 3 x 32i8 into 96i8 (and store)


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