[PATCH] D110838: [X86][Costmodel] Load/store i64/f64 Stride=2 VF=8 interleaving costs
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 1 07:49:46 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGabd37de63ee9: [X86][Costmodel] Load/store i64/f64 Stride=2 VF=8 interleaving costs (authored by lebedev.ri).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110838/new/
https://reviews.llvm.org/D110838
Files:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: store i64 %v1, i64* %out1, align 8
-; AVX2: LV: Found an estimated cost of 52 for VF 8 For instruction: store i64 %v1, i64* %out1, align 8
+; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 104 for VF 16 For instruction: store i64 %v1, i64* %out1, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v1, i64* %out1, align 8
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: store double %v1, double* %out1, align 8
-; AVX2: LV: Found an estimated cost of 32 for VF 8 For instruction: store double %v1, double* %out1, align 8
+; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 64 for VF 16 For instruction: store double %v1, double* %out1, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v1, double* %out1, align 8
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 52 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 104 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
@@ -26,7 +26,7 @@
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 6 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 32 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 12 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 64 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5083,6 +5083,7 @@
{2, MVT::v2i64, 2}, // (load 4i64 and) deinterleave into 2 x 2i64
{2, MVT::v4i64, 4}, // (load 8i64 and) deinterleave into 2 x 4i64
+ {2, MVT::v8i64, 8}, // (load 16i64 and) deinterleave into 2 x 8i64
{3, MVT::v2i8, 10}, // (load 6i8 and) deinterleave into 3 x 2i8
{3, MVT::v4i8, 4}, // (load 12i8 and) deinterleave into 3 x 4i8
@@ -5133,6 +5134,7 @@
{2, MVT::v2i64, 2}, // interleave 2 x 2i64 into 4i64 (and store)
{2, MVT::v4i64, 4}, // interleave 2 x 4i64 into 8i64 (and store)
+ {2, MVT::v8i64, 8}, // interleave 2 x 8i64 into 16i64 (and store)
{3, MVT::v2i8, 7}, // interleave 3 x 2i8 into 6i8 (and store)
{3, MVT::v4i8, 8}, // interleave 3 x 4i8 into 12i8 (and store)
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D110838.376537.patch
Type: text/x-patch
Size: 5265 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211001/25b9d888/attachment.bin>
More information about the llvm-commits
mailing list